isp1181 NXP Semiconductors, isp1181 Datasheet - Page 29

• Manufacturer Part Number: isp1181
• Description: Isp1181 Full-speed Universal Serial Bus Interface Device
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 21:
9397 750 08938
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Hardware Configuration Register: bit allocation
reserved
DAKOLY
R/W
R/W
15
0
7
0
DRQPOL
EXTPUL
Table 22:
Bit
15
14
13
12
11 to 8
7
6
5
4
3
R/W
R/W
14
0
6
1
Hardware Configuration Register: bit description
Symbol
-
EXTPUL
NOLAZY
CLKRUN
CKDIV[3:0]
DAKOLY
DRQPOL
DAKPOL
EOTPOL
WKUPCS
NOLAZY
DAKPOL
R/W
R/W
13
1
5
0
Rev. 04 — 30 October 2001
CLKRUN
EOTPOL
Description
reserved
A logic 1 indicates that an external 1.5 k pull-up resistor is
used on pin D and that SoftConnect is not used. Bus reset
value: unchanged.
A logic 1 disables output on pin CLKOUT of the LazyClock
frequency (115 kHz 10 %) during ‘suspend’ state. A logic 0
causes pin CLKOUT to switch to LazyClock output after
approximately 2 ms delay, following the setting of bit GOSUSP
in the Mode Register. Bus reset value: unchanged.
A logic 1 indicates that the internal clocks are always running,
even during ‘suspend’ state. A logic 0 switches off the internal
oscillator and PLL, when they are not needed. During ‘suspend’
state this bit must be made logic 0 to meet the suspend current
requirements. The clock is stopped after a delay of
approximately 2 ms, following the setting of bit GOSUSP in the
Mode Register. Bus reset value: unchanged.
This field specifies the clock division factor N, which controls the
clock frequency on output CLKOUT. The output frequency in
MHz is given by 48/(N + 1) . The clock frequency range is
3 to 48 MHz (N = 0 to 15). with a reset value of 12 MHz (N = 3).
The hardware design guarantees no glitches during frequency
change. Bus reset value: unchanged.
A logic 1 selects DACK-only DMA mode. A logic 0 selects 8237
compatible DMA mode. Bus reset value: unchanged.
Selects DREQ signal polarity (0 = active LOW, 1 = active
HIGH). Bus reset value: unchanged.
Selects DACK signal polarity (0 = active LOW, 1 = active HIGH).
Bus reset value: unchanged.
Selects EOT signal polarity (0 = active LOW, 1 = active HIGH).
Bus reset value: unchanged.
A logic 1 enables remote wake-up via a LOW level on input CS.
Bus reset value: unchanged.
R/W
R/W
12
0
4
0
WKUPCS
R/W
R/W
11
0
3
0
PWROFF
R/W
R/W
10
0
2
0
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
CKDIV[3:0]
Full-speed USB interface
INTLVL
R/W
R/W
9
1
1
0
ISP1181
INTPOL
R/W
R/W
8
1
0
0
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