isp1563 NXP Semiconductors, isp1563 Datasheet - Page 77

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isp1563

Manufacturer Part Number
isp1563
Description
Hi-speed Universal Serial Bus Pci Host Controller
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 115. ASYNCLISTADDR - Current Asynchronous List Address register bit description
Address: Content of the base address register + 38h
Table 116. CONFIGFLAG - Configure Flag register bit allocation
Address: Content of the base address register + 60h
[1]
Table 117. CONFIGFLAG - Configure Flag register bit description
Address: Content of the base address register + 60h
ISP1563_2
Product data sheet
Bit
31 to 5
4 to 0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 1
0
The reserved bits should always be written with the reset value.
Symbol
LPL[26:0]
reserved
Symbol
reserved
CF
11.4.7 CONFIGFLAG register
11.4.8 PORTSC registers 1, 2, 3, 4
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
Description
Link Pointer List: These bits correspond to memory address signals 31 to 5, respectively. This field
may only reference a Queue Head (QH).
-
The bit allocation of the Configure Flag (CONFIGFLAG) register is given in
The Port Status and Control (PORTSC) register is in the auxiliary power well. It is only
reset by hardware when the auxiliary power is initially applied or in response to a Host
Controller reset. The initial conditions of a port are:
Description
-
Configure Flag: The host software sets this bit as the last action in its process of configuring the
Host Controller. This bit controls the default port-routing control logic.
0 — Port routing control logic default-routes each port to an implementation-dependent classic
Host Controller.
1 — Port routing control logic default-routes all ports to this Host Controller.
No device connected
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 02 — 15 March 2007
reserved
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
reserved
reserved
reserved
[1]
[1]
[1]
[1]
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
HS USB PCI Host Controller
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
© NXP B.V. 2007. All rights reserved.
ISP1563
Table
R/W
R/W
R/W
R/W
116.
CF
77 of 102
24
16
0
0
8
0
0
0

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