mc33905s Freescale Semiconductor, Inc, mc33905s Datasheet - Page 30

• Manufacturer Part Number: mc33905s
• Description: System Basis Chip Gen2 With High Speed Can And Lin Interface
• Manufacturer: Freescale Semiconductor, Inc

DGB (DGB) AND DEBUG MODE
The DBG pin has 2 functions:
Primary function:
is achieved by applying a voltage between 8V and 10V, at the
debug terminal, and then powering up the device (ref to state
diagram). When device leaves the INIT reset mode and enter
in INIT mode, device detects that voltage at debug terminal is
within the 8-10V range, and activate the debug mode.
commands is necessary. This allow easy debug of the
hardware and software routines (i.e SPI commands).
de bug mode, when voltage at DBG terminal falls below the
8-10V range, the debug mode is left, and device start W/D
operation, and expect proper W/D refresh.Debug mode can
be left by SPI. Such command is recommended to avoid
staying in debug mode in case of unwanted debug mode
selection (pin FMEA). SPI command to leave debug has
higher priority than providing 8-10V at debug pin.
Secondary function:
the Fail Safe Mode operation. DBG pin can also be
connected directly to gnd (this prevent usage of debug
mode).
30
33904/5
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
V
It is an output used to set the device in Debug Mode. This
When debug mode is detected, no watchdog SPI refresh
Device is in debug mode is reported by SPI flag. While in
The resistor connected between DBG pin and gnd selects
BAT
R
SENSE
VSENSE
VSUP_1
1k
D1
I/O-0
I/O-1
S_in
S_in
S_in
S_in
S-i/o_att
S-i/o_att
Figure 17. Analog Multiplexer Block Diagram
Multiplexer
Temp
Vref: 2.5V
buffer
5V-CAN
S_iddc
S_g3.3
operation via a resistor at the DBG pin or via SPI command.
The SPI command has higher priority than the hardware
selection via Debug resistor.
not be configured via the resistor connected at DBG pin.
SAFE
Safe output terminal
event occurs. The objective is to drive electrical safe circuitry
and set the ECU in a know sate independent of the MCU and
SBC, once a failure has been detected.
up. No current flow is allowed when SAFE is forced externally
to a high-voltage (< 40V).
INTERRUPT (INT)
when an interrupt condition occurs. The INT condition is
enabled in the INT register. The selection of low level or pulse
as well as pulse duration are selected by SPI.
low, in Low Power V
connection of an external pull resistor, and connection of an
INT pin from other ICs without extra consumption in
unpowered mode.
Flexibility is provided to the user to select SAFE output
When the Debug mode is selected, the SAFE modes can
This pin is an output which is asserted low in case a fault
The SAFE output structure is an open drain, without a pull-
The INT output is asserted low or generate a low pulse
No current will flow inside the INT structure when VDD is
All swicthes and resistor are configured and controlled via the
SPI.
R
used.
S_g3.3 and S_g5 for 5.0V or 3.3V MCU.
S_iddc to select V
S_in1 for Low Power Mode resistor bridge disconnection.
S_ir to switch on/off of the internal R
S_g5
V
M
: internal resistor connected when V
DD-I_COPY
R
S_ir
DD
MI
DD
Analog Integrated Circuit Device Data
OFF Mode. This allows the
regulator current copy.
5V-CAN
MUX-OUT
R
M(*)
Freescale Semiconductor
MI
resistor.
REG
(*)Optional
MCU
A/D in
current monitor is