mc33905s Freescale Semiconductor, Inc, mc33905s Datasheet - Page 73

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mc33905s

Manufacturer Part Number
mc33905s
Description
System Basis Chip Gen2 With High Speed Can And Lin Interface
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Analog Integrated Circuit Device Data
Freescale Semiconductor
Table 34. LIN 1 Register, LIN1
[b_15 b_14] 10_010 [P/N]
MOSI First byte [15-8]
b7 b6
b5 b4
Bits
Condition for default
00
01
10
11
00
01
10
11
b2
b0
0
1
0
1
01 10_ 011P
Default state
LIN mode [1], LIN mode [0] - LIN 1 interface mode control, wake-up enable / disable
LIN1 disable, wake-up capability disable
not used
LIN1 disable, wake-up capability enable
LIN1 Transmit Receive mode
Slew rate[1], Slew rate[0] LIN 1 slew rate selection
Slew rate for 20kbit/s baud rate
Slew rate for 10kbit/s baud rate
Slew rate for fast baud rate
Slew rate for fast baud rate
LIN T1 on
LIN 1 termination OFF
LIN 1 termination ON
Vsup ext
LIN goes recessive when device Vsup2 is below typ 6V. This is to meet J2602 specification
LIN continues operation below Vsup2 6V, until 5V-CAN is disabled.
LIN mode[1]
bit 7
0
LIN mode[0]
bit 6
0
Slew rate[1]
bit 5
0
Slew rate[0]
Description
MOSI Second Byte, bits 7-0
bit 4
0
POR
DETAIL OF CONTROL BITS AND REGISTER MAPPING
bit 3
0
-
LIN T1 on
bit 2
0
SERIAL PERIPHERAL INTERFACE
bit 1
0
-
Vsup ext
bit 0
0
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