mc33905s Freescale Semiconductor, Inc, mc33905s Datasheet - Page 68

• Manufacturer Part Number: mc33905s
• Description: System Basis Chip Gen2 With High Speed Can And Lin Interface
• Manufacturer: Freescale Semiconductor, Inc

flags must be cleared or read.
oxE380 for CAN and I/O wake up respectively. Ref to table
“Device Flag, I/O real time and Device Identification” for
details.
selected LP mode but will wake up immediately. When the
device is in LP Vdd ON mode, the wake up by SPI command
uses a write to “Normal Request Mode”, 0x5C10.
allow to decode the device current mode.
68
33904/5
SERIAL PERIPHERAL INTERFACE
DETAIL OF CONTROL BITS AND REGISTER MAPPING
Table 27. Device Modes
Prior to enter in LP Vdd ON or LP Vdd OFF, the wake up
This is done by the following SPI commands: 0xE100 and
If wake up flags are not cleared, device will enter in
Tables below describe the meaning of MISO bits 7-0, that
Table 28. MISO bits 7-0
Read device current Mode, Leave debug mode.
Read device current Mode, Leave debug mode.
Read device current mode, Keep DEBUG mode
MISO reports Debug and SAFE state (bits 1,0)
MISO reports Debug and SAFE state (bits 1,0)
Device current mode, any of the above command
b7, b6, b5, b4, b3
Release SAFE terminal (turn OFF).
Release SAFE terminal (turn OFF).
Global commands and effects
MOSI in hexadecimal: DD 00
MOSI in hexadecimal: DD 80
MOSI in hexadecimal: 1D 00
MOSI in hexadecimal: 1D 80
Read device current mode
Keep SAFE terminal as is.
Keep SAFE terminal as is.
0 0000
0 0001
0 0010
0 0011
Normal Request
Normal mode
FLASH
MODE
INIT
MOSI
MISO
MOSI
MISO
MOSI
MISO
MOSI
MISO
bits 15-14
bits 15-14
bits 15-14
bits 15-14
00
00
11
11
Fix Status
Fix Status
Fix Status
Fix Status
bit 15-8
bit 15-8
bit 15-8
bit 15-8
Mode Register Features
SPI command” that allow the following:
adress bit [13-9], along with several combinations of bit [15-
14] and bit [7]. Note that bit [8] is always set to 1.
bits 13-9
bits 13-9
bits 13-9
bits 13-9
decoding.
01 110
01 110
01 110
01 110
The mode register include specific function and “global
- read device current mode
- read device Debug status
- read state of SAFE terminal
- leave Debug state
- release or turn off SAFE terminal
These global commands are built using the MODE register
The table below summarize these commands
Table below describes the SAFE and DEBUG bit
Table 29. SAFE and DEBUG status
device current mode
device current mode
device current mode
device current mode
b1
b0
0
1
0
1
bit 8
bit 8
bit 8
bit 8
1
1
1
1
bit 7-3
bit 7-3
bit 7-3
bit 7-3
SAFE and DEBUG bits
bit 7
bit 7
bit 7
bit 7
Analog Integrated Circuit Device Data
0
1
0
1
SAFE terminal OFF, not activated
DEBUG mode Active
DEBUG mode OFF
bit 2
bit 2
X
X
description
Freescale Semiconductor
FLASH
Random code
Random code
000 0000
000 0000
000 0000
000 0000
bits 6-0
bits 6-0
bits 6-0
bits 6-0
SAFE
SAFE
bit 2-0
bit 2-0
bit 1
bit 1
DEBUG
DEBUG
bit 0
bit 0