lan9312 Standard Microsystems Corp., lan9312 Datasheet - Page 294

• Manufacturer Part Number: lan9312
• Description: Lan9312 High Performance Two Port 10/100 Managed Ethernet Switch With 32-bit Non-pci Cpu Interface
• Manufacturer: Standard Microsystems Corp.

Revision 1.2 (04-08-08)
14.4.2.5
BITS
15
14
13
12
10
11
9
8
7
Next Page
This bit determines the advertised next page capability. The LAN9312 is not
next page capable. Therefore, this bit must always be 0.
0: PHY does not advertise next page capability
1: PHY advertises next page capability
RESERVED
Remote Fault
This bit determines if remote fault indication will be advertised to the link
partner.
0: Remote fault indication not advertised
1: Remote fault indication advertised
RESERVED
Note:
Asymmetric Pause
This bit determines the advertised asymmetric pause capability.
0: No Asymmetric PAUSE toward link partner advertised
1: Asymmetric PAUSE toward link partner advertised
Symmetric Pause
This bit determines the advertised symmetric pause capability.
0: No Symmetric PAUSE toward link partner advertised
1: Symmetric PAUSE toward link partner advertised
100BASE-T4
This bit determines the advertised 100BASE-T4 capability. The LAN9312
does not support T4 capability. Therefore, this bit must always be 0.
0: 100BASE-T4 ability not advertised
1: 100BASE-T4 ability advertised
100BASE-X Full Duplex
This bit determines the advertised 100BASE-X full duplex capability.
0: 100BASE-X full duplex ability not advertised
1: 100BASE-X full duplex ability advertised
100BASE-X Half Duplex
This bit determines the advertised 100BASE-X half duplex capability.
0: 100BASE-X half duplex ability not advertised
1: 100BASE-X half duplex ability advertised
Port x PHY Auto-Negotiation Advertisement Register (PHY_AN_ADV_x)
This read/write register contains the advertised ability of the Port x PHY and is used in the Auto-
Negotiation process with the link partner.
Note: This register is re-written by the EEPROM Loader following the release of reset or a RELOAD
This bit should be written as 0.
command. Refer to
Index (decimal): 4
DESCRIPTION
Section 10.2.4, "EEPROM Loader," on page 149
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
294
Size:
16 bits
for additional information.
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
SMSC LAN9312
Note 14.53
Note 14.53
Note 14.54
DEFAULT
Datasheet
0b
0b
0b
0b
0b
1b
1b
-