lan9312 Standard Microsystems Corp., lan9312 Datasheet - Page 46

• Manufacturer Part Number: lan9312
• Description: Lan9312 High Performance Two Port 10/100 Managed Ethernet Switch With 32-bit Non-pci Cpu Interface
• Manufacturer: Standard Microsystems Corp.

Revision 1.2 (04-08-08)
4.3
eeprom_type_strap
eeprom_size_strap[1:0]
phy_addr_sel_strap
STRAP NAME
The LAN9312 Port 1 and Port 2 PHYs and the Host MAC support several power management and
wakeup features.
The LAN9312 can be programmed to issue an external wake signal (PME) via several methods,
including wake on LAN, wake on link status change (energy detect), and magic packet wakeup. The
PME signal is ideal for triggering system power-up using remote Ethernet wakeup events. A simplified
diagram of the logic that controls the PME and PME_INT signals can be seen in
The PME module handles the latching of the Port 1 & 2 PHY Energy-Detect Status (ED_STS1 and
ED_STS2) and Wake-On LAN Status (WOL_STS) bits of the
(PMT_CTRL). This module also masks the status bits with the corresponding enable bits (ED_EN1,
ED_EN2, WOL_EN) and combines the results together to generate the PME_INT status bit in the
Interrupt Status Register
conditioned before becoming the PME output pin.
The PME output characteristics can be configured via the PME_TYPE, PME_IND, and PME_POL bits
of the
active high push-pull, or active-low push-pull and configure the output to be continuous, or pulse for
50mS.
Power Management
Power Management Control Register
Table 4.3 Hard-Strap Configuration Strap Definitions
EEPROM Type Strap: Configures the EEPROM type.
0 = Microwire Mode
1 = I
EEPROM Size Strap [1:0]: Configures the EEPROM size
range as specified in
EEPROM Controller," on page
PHY Address Select Strap: Configures the default MII
management address values for the PHYs and Virtual PHY
as detailed in
0
1
2
C Mode
(INT_STS). The PME_INT status bit is then masked with the PME_EN bit and
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
0
1
Section 7.1.1, "PHY Addressing," on page
DATASHEET
1
2
Section 10.2, "I2C/Microwire Master
DESCRIPTION
46
(PMT_CTRL). These bits allow the PME to be open-drain,
2
3
137.
Power Management Control Register
82.
EEPROM_TYPE
EEPROM_SIZE_[1:0]
PHY_ADDR_SEL
Figure
SMSC LAN9312
PIN
4.1.
Datasheet