74vcx32245 Fairchild Semiconductor, 74vcx32245 Datasheet
74vcx32245
Related parts for 74vcx32245
74vcx32245 Summary of contents
Page 1
... The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. The 74VCX32245 is designed for low voltage (1.65V to 3.6V) V applications with I/O compatibility up to 3.6V. CC ...
Page 2
Connection Diagram (Top Thru View) Truth Tables Inputs Outputs OE T Bus B –B Data to Bus Bus A –A Data to Bus HIGH Z State ...
Page 3
Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( Outputs 3-STATE Outputs Active (Note 4) 0 Input Diode Current ( Output ...
Page 4
DC Electrical Characteristics Symbol Parameter V HIGH Level Input Voltage IH V LOW Level Input Voltage IL V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current I I 3-STATE Output Leakage OZ I ...
Page 5
AC Electrical Characteristics Symbol Parameter Prop Delay PHL PLH Output Enable Time PZL PZH Output Disable Time PLZ PHZ Note 9: For C 50pF, add approximately 300ps to the AC maximum ...
Page 6
AC Loading and Waveforms TEST PLH PHL PZL PLZ PZH PHZ FIGURE 2. Waveform for Inverting and Non-inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage ...
Page 7
Physical Dimensions inches (millimeters) unless otherwise noted 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...