dm74ls166 Fairchild Semiconductor, dm74ls166 Datasheet - Page 4

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dm74ls166

Manufacturer Part Number
dm74ls166
Description
8-bit Parallel-in/serial-out Shift Register
Manufacturer
Fairchild Semiconductor
Datasheet

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Part Number:
dm74ls166M
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f
t
t
t
MAX
PLH
PHL
PHL
Switching Characteristics
at V
Parameter Measurement Information
Note A: The clock pulse has the following characteristics: t
Note B: A clear pulse is applied prior to each test.
Note C: Propagation delay times (t
Note D: t
Note E: V
Symbol
CC
t
t
t
W(clear)
n 1
n 8
n
REF
5V and T
bit time before clocking transition
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
bit time after one clocking transition
bit time after eight clocking transitions
1.3V.
20 ns and t
A
25 C
Parameter
HOLD
PLH
0 ns. When testing f
and t
PHL
) are measured at t
Data Input
Serial Input
for Test
Test Table for Synchronous Inputs
H
MAX
W(clock)
, vary the clock PRR.
Clock to Output
Clock to Output
Clear to Output
From (Input)
To (Output)
Voltage Waveforms
n 1
20 ns and PRR
. Proper shifting of data is verified at t
Shift/Load
4.5V
0V
4
1 MHz. The clear pulse has the following characteristics:
Output Tested
(See Note C)
Q
Q
Min
25
H
H
8
8
6
at T
at T
C
L
N 1
N 8
15 pF
n 8
Max
35
35
30
with a functional test.
R
L
2 k
Min
20
C
L
50 pF
Max
38
41
36
Units
MHz
ns
ns
ns

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