tc58512ft TOSHIBA Semiconductor CORPORATION, tc58512ft Datasheet
tc58512ft
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tc58512ft Summary of contents
Page 1
... ALE Address latch enable Write protect Ready/Busy I/O4 GND Ground input 31 I/O3 30 I/O2 29 I/O1 V Power supply Ground TC58512FT = 2 3 min 10 mA typ typ typ. 100 mA 000707EBA1 2001-03-05 1/43 ...
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... HV generator VALUE -0.6 to 4.6 -0.6 to 4.6 -0 0.3 V (£ 4 0.3 260 -55 to 150 CONDITION MIN = 0 V ¾ ¾ V OUT TC58512FT Column buffer Column decoder Data register Sense amp Memory cell array UNIT °C °C °C MAX UNIT 10 ...
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... I IL OUT cycle = cycle = cycle = cycle ¾ ¾ 0 -400 2 0.4 V pin V OL TC58512FT TYP. MAX UNIT ¾ 4096 Blocks TYP. MAX UNIT 3.3 3.6 V ¾ ¾ 0.8 V MIN TYP. MAX UNIT ¾ ¾ ±10 mA ¾ ...
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... CE High to Ready (When interrupted Read Mode) CRY t Device Reset Time (Read/Program/Erase) RST AC TEST CONDITIONS PARAMETER Input level Input pulse rise and fall time Input comparison level Output data comparison level Output load TC58512FT MIN MAX UNIT NOTES ¾ ¾ ¾ ...
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... Ready. ³ 100 ns t CEH 527 A Busy t CRY ( 0° to 70°C, V MIN TYP. ¾ 200 ¾ 2 ¾ 200 ¾ ¾ ¾ 2 TC58512FT pin ® Busy signal is not output 2 3 MAX UNIT NOTES ms 1000 ...
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... TIMING DIAGRAMS Latch Timing Diagram for Command/Address/Data CLE ALE I/O1 to I/O8 Command Input Cycle Timing Diagram CLE t CLS ALS ALE t DS I/O1 to I/O8 Setup Time Hold Time CLH ALH t DH TC58512FT : 2001-03-05 6/43 ...
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... A16 A17 to A24 TC58512FT ALH A25 : CLH 527 ...
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... DS I/O1 70H 70H represents the hexadecimal number REH RHZ REA RHZ t CLS WHC CSTO t WHR TC58512FT CHZ REA RHZ t CHZ RSTO RHZ Status output : 2001-03-05 8/43 ...
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... A25 to A24 ALH AR2 REA A17 D D OUT A25 to A24 N TC58512FT t CEH t CRY OUT OUT OUT 527 CHZ RC t RHZ OUT OUT ...
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... Read operation using 50H command ALH A17 A25 A16 to A24 t ALH A17 A25 A16 to A24 TC58512FT t AR2 REA OUT OUT OUT 256 + N 256 + 527 : AR2 ...
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... N to A24 Page t R address M Page M access A17 A25 to A24 Page 256 + 256 + 256 + t R address Page M access TC58512FT 527 527 t R Page access : 527 527 t R Page access : 2001-03-05 11/43 ...
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... Sequential Read (3) Timing Diagram CLE CE WE ALE RE I/ 50H I/O8 A16 Column address A17 A25 to A24 Page 512 + 512 + 512 + t R address Page M access TC58512FT 527 512 513 514 527 t R Page access : 2001-03-05 12/43 ...
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... Do not input data while data is being output ALH WB BERASE D0H Erase Start Busy command : not input data while data is being output TC58512FT t PROG 10H 70H Status output 70H Status output Status Read command ...
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... A16 (Page programming in multi block) t ALH t ALS A17 A25 527 IN Auto program (dummy) Max 3 times repeat 31 times repeat Max 4 blocks programming TC58512FT t DBSY 11H 80H A7 Last district input 2 2001-03-05 14/43 ...
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... ALH t ALS A17 A25 527 IN Auto program (multi block program) Last district input 31 times repeat Max 4 blocks programming TC58512FT t MBPBSY 15H 80H A7 3 Max 3 times repeat 2001-03-05 15/43 ...
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... Do not input data while data is being output. 3 (Last pages programming in multi block) t ALH t ALS A17 A25 527 IN Auto program (dummy) Max 3 times repeat Max 4 blocks programming TC58512FT t DBSY 11H 80H A7 4 Last district input 2001-03-05 16/43 ...
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... Do not input data while data is being output. 4 Max 3 times repeat (Last pages programming in multi block) t ALH t ALS A17 A25 527 IN Auto program (true) Last district input Max 4 blocks programming TC58512FT t Prog 10H 71H Status output 5 Status read 2001-03-05 17/43 ...
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... A9 to A17 to 60H A16 A24 to I/O8 Auto Block Erase Setup command Max 4 times repeat : not input data while data is being output ALH WB BERASE A25 D0H Erase Start Busy command TC58512FT 71H Status output Status Read command 2001-03-05 18/43 ...
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... ALH ALS ALE I/O1 91H to I/ ALH AR1 t t REAID REAID 00 98H Address Maker code input ALH AR1 t REAID 00 20H Address input TC58512FT 76H Device code : 2001-03-05 19/43 ...
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... CLE 16 ALE Figure 1. Pinout = L), such as during a Program or Erase operation, and after the falling edge REA TC58512FT I/O8 43 I/O7 42 I/ ...
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... A10 A9 A22 A21 A20 A19 A18 A17 * A25 CLE ALE TC58512FT Column address A9 to A25 : Page address A14 to A25 : Block address A9 to A13 : NAND address in block 2001-03-05 21/43 ...
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... D0 Q ¾ Q ¾ ¾ ¾ TC58512FT HEX data bit assignment (Example) Serial Data Input: 80H I/ I/O1 I/O1 to I/O8 Power Output Active High impedance Active High impedance Standby ...
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... The operation of the device after input of the 01H command is the same as that of Read mode (1). If the start pointer set after column address 256, use Read mode (2). However, for a Sequential Read, output of the next page starts Cell array from column address 0. TC58512FT 2001-03-05 23/43 ...
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... A4-to-A7 address. (A “00H” command is necessary to move the pointer back to the 0-to-511 main memory cell location.) Data output Busy Busy (01H) 256 527 A Sequential Read (2) TC58512FT Data output t R Busy (50H) 512 527 A Sequential Read (3) 2001-03-05 24/43 ...
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... Fail: 1 Busy: 0 Not Protected Device 3 Busy 70H Status on Device N BY pin signals from multiple devices are wired together as shown in the TC58512FT The Pass/Fail status on I/O1 is only valid when the device is in the Ready state Device Device ...
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... After programming, the programmed data is transferred back to the register to be automatically verified by the device. If the programming does not succeed, the Program/Verify operation is repeated by the device until success is achieved or until the maximum loop number set in the device is reached. 70 Status Read command Busy TC58512FT Pass I/O Fail Pass I/O Fail 2001-03-05 26/43 ...
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... Dummy Data input Program Program command command command 11 80 Data input Address Data input input 0 to 527 input 0 to 527 11 80 (District 1) (District 2) TC58512FT Multi block Data input Program command command Address Data input input 0 to 527 (District 3) 2001-03-05 27/43 ...
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... If more than one fail occurred in 32 times ´ Pass: 0 Fail (512 + 16 byte) page write operation in Pass: 0 Fail: 1 District 0 area, it shows “Fail” condition. Do not care I/O3, I/O4 and I/O5 are as same manner Ready: 1 Busy I/O2. Protect: 0 Not Protect: 1 TC58512FT 2001-03-05 28/43 ...
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... Status Read operation Untill the Ready condition after the programming terminated by “10H” command, effective bit in the Status data is limited on Ready/Busy bit. In other words, Pass/Fail condition can be checked only in the Ready condition after “10H” command. TC58512FT 2001-03-05 29/43 ...
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... If at least one fail occurred in Max 4 Blocks Pass: 0 Fail: 1 erase operation, it shows “Fail” condition. Pass: 0 Fail: 1 I/O2 describes Pass/Fail condition. Pass: 0 Fail fail occurred in District 0 area, it shows “Fail” condition. Pass: 0 Fail: 1 I/O3, I/O4 and I/O5 are as same manner Do not care as I/O2. Ready: 1 Busy: 0 Protect: 0 Not Protect: 1 TC58512FT 2001-03-05 30/43 ...
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... RST FF (max 500 ms) t RST FF (max 6 ms) t RST 70 I/O status: Pass/Fail ® Pass I/O status: Ready/Busy ® Busy (1) ( command is invalid, but the third TC58512FT Figure 8. 00 Figure 9. 00 Figure 10. 00 Figure 11. Ready/Busy ® Ready Figure 12. (3) FF command is valid. 2001-03-05 31/43 ...
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... Table 6. ID Codes read out by ID read command (1) 90H I/O8 I/O7 Maker code 1 0 Device code AR1 t REAID 98H Maker code , t and t refer to the AC Characteristics. REAID CR AR1 Figure 13. ID Read timing I/O6 I/O5 I/O4 I/O3 I/ TC58512FT 76H Device code I/O1 Hex Data 0 98H 0 76H 2001-03-05 32/43 ...
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... ID Read command (2) Address 00 For the specifications of the access times t Table 7. ID Codes read out by command 91H I/O8 I/O7 Extended ID code AR1 t REAID 20H Extended ID code , t and t refer to the AC Characteristics. REAID CR AR1 Figure 14. ID Read timing I/O6 I/O5 I/O4 I/O3 I/ TC58512FT I/O1 Hex Data 0 20H 2001-03-05 33/43 ...
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... V and CE signal is kept high Operation Figure 15. Power-on/off Sequence becomes 2 recommends starting access after about CC FF Reset Figure 16. For this operation the “FFH” command is needed. TC58512FT Don’t care V IL 2001-03-05 34/43 ...
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... Read mode. In this case, data output starts automatically from address N and address input is unnecessary Ex.) Random page program (Prohibition) DATA IN: Data (1) Page 0 Page 1 Page 2 Page 15 Page 31 Figure 17. page programming within a block 70 Status Read command input Figure 18. TC58512FT Data (32) Data register (2) (16) (3) (1) (32) 00 [A] Status Read Status output 2001-03-05 35/43 ...
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... C area Add Start point A area 10H Start point Add DIN C Area 10H Start point Add DIN B Area Figure 20. Example of How to Set the Pointer TC58512FT 255 256 511 512 527 B C Pointer control 50H Add Start point C area 00H Add Start point ...
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... We recommend that you use this data as a reference when selecting a resistor value Ready 1 TC58512FT / BY buffer consists of an open drain 3.0 V Busy 1 3 25° 100 ...
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... The Erase and Program operations are automatically reset when WP goes Low. The operations are enabled and disabled as follows: Enable Programming WE DIN (100 ns min) WW Disable Programming WE 80 DIN (100 ns min) WW Enable Erasing WE DIN (100 ns min) WW Disable Erasing WE DIN (100 ns min) WW TC58512FT 2001-03-05 38/43 ...
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... Although the device may read in a fifth address ignored inside the chip. Read operation CLE CE WE ALE I/O 00H, 01H or 50H Program operation CLE CE WE ALE I/O 80H Address input WE Internal read operation starts when WE goes High in the fourth cycle. Figure 22. Address input ignored Figure 23. TC58512FT ignored Data input 2001-03-05 39/43 ...
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... Busy state. (Refer to Figure 25.) I/O 00H/01H/50H Hence the RE clock input must start after the address input. All 1s Data Pattern 2 All 1s All 1s Data Pattern 2 Figure 24. Address input Figure 25. TC58512FT Data Pattern 3 Data Pattern 3 2001-03-05 40/43 ...
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... The number of valid blocks at the time of shipment is as follows: MIN Valid (Good) Block Number 4016 Read Check: to verify all pages in the block Start Block Fail Read Check Pass Bad Block *1 Block No. = 4096 Yes End Figure 27 TC58512FT TYP. MAX UNIT ¾ 4096 Block with FF (Hex) 2001-03-05 41/43 ...
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... Block Verify after Program ® Retry (2) ECC When an error happens in Block A, try to reprogram the data into another Block (Block B) by loading from an external buffer. Then, Block A prevent further system accesses to Block A (by creating a bad block table or by using an another appropriate scheme). Block B Figure 28. TC58512FT 2001-03-05 42/43 ...
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... Package Dimensions Weight: 0.53 g (typ.) TC58512FT 2001-03-05 43/43 ...