tc58512ft TOSHIBA Semiconductor CORPORATION, tc58512ft Datasheet - Page 26
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tc58512ft
Manufacturer Part Number
tc58512ft
Description
Tentative Toshiba Mos Digital Integrated Circuit Silicon Gate Cmos
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TC58512FT.pdf
(43 pages)
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Auto Page Program
the address and data have been input. The sequence of command, address and data input is shown below.
(Refer to the detailed timing chart.)
Auto Block Erase
which follows the Erase Setup command “80H”. This two-cycle process for Erase operations acts as an ertra layer
of protection from aceidental erasure of data due to external noise. The device automatically executes the Erase
and Verify operations.
The device carries out an Automatic Page Program operation when it receives a “10H” Program command after
Data input
The Auto Block Erase operation starts on the rising edge of WE after the Erase Start command “D0H”
command
RY
RY
Data input
/
/
80
BY
BY
Selected
Figure 7. Auto Page Program operation
page
Address
60
Program
input
Block Address
input: 3 cycles
Data input
0 to 527
Erase Start
Reading & verification
command
command
Program
D0
10
page on the rising edge of WE following input of the “10H” command.
After programming, the programmed data is transferred back to the
register to be automatically verified by the device. If the programming
does not succeed, the Program/Verify operation is repeated by the device
until success is achieved or until the maximum loop number set in the
device is reached.
The data is transferred (programmed) from the register to the selected
Busy
completion of the operation.
RY
Status Read
Status Read
command
command
/
BY
70
70
automatically returns to Ready after
I/O
I/O
2001-03-05 26/43
Fail
Fail
Pass
Pass
TC58512FT