W83791D Information Storage Devices, Inc, W83791D Datasheet - Page 17

• Manufacturer Part Number: W83791D
• Description: Hardware Monitor With Speech Synthesizer And Asf Functions
• Manufacturer: Information Storage Devices, Inc

6.
6.1 General Description
Width Modulation) control, 3 thermal inputs from remote thermistors ¡ B 2N3904 transistors or Pentium
(Deschutes) thermal diode outputs, case open detection and beep function output when the monitored values exceed
preset ranges , including the voltage, temperature, and fan count. Moreover, W83791D uniquely provides several
innovative and practical functions to make the whole system more efficient and compliant with future trend of
network management, such as speech function, ASF sensor compliant, SMBus 2.0 ARP command compatible, VID
table selection trapping, 5VID output control, and so forth. Once the monitoring function ofW83791D is enabled,
the watch dog machine will monitor every function and store the values to registers for comparison with preset
ranges. If the monitoring value exceeds the limit value, the interrupt status will be set to 1 and W83791D will issue
interrupt signals such as SMI# and IRQ if not masked..
6.2 Access Interface
there are three serial bus addresses. Through the first address defined at CR[48h], all the registers can be read and
written except CPUT1/CPUT2 temperature sensor registers. The read/write of the CPUT1/CPUT2 temperature
sensor registers can be implemented through the second address (defined at CR[4Ah] bit2-0) and the third address
(defined at CR[4Ah] bit6-4).
001011[pin11][pin10]. Hence, the content of CR[48h] would be 00101110 if pin11=1 and pin10=0 .
6.2.1
SCL
SDA
(a) Serial bus write to internal address register followed by the data byte
FUNCTION DESCRIPTION
The W83791D provides 10 analog positive inputs, 5 fan speed inputs , at most 5 sets for fan PWM (Pulse
The W83791D provides I
The first serial bus address of W83791D has 2 hardware setting bits set by pin10-11. The address is
Start By
Master
The first serial bus access timing
0
0
Figure 1. Serial Bus Write to Internal Address Register followed by the Data Byte
1
Serial Bus Address Byte
0
SCL
SDA (Continued)
Frame 1
1
(Continued)
1
2
C Serial Bus for microprocessor to read/write internal registers. In the W83791D,
0
1
R/W
7
0
D7
791D
8
Ack
D6
by
0
D7
D5
10
D6
D4
Internal Index Register Byte
D5
D3
Data Byte
Frame 3
Frame 2
D2
D4
D3
D1
D2
7
D0
Publication Release Date: Aug, 2001
784R
791D
D1
8
Ack
Ack
by
by
7
D0
Master
Stop
by
791D
8
Ack
by
W83791D
Preliminary
Revision 0.41
TM
II/III