tc94a58fg TOSHIBA Semiconductor CORPORATION, tc94a58fg Datasheet - Page 2

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tc94a58fg

Manufacturer Part Number
tc94a58fg
Description
Single-chip Cd Processor With Built-in Controller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
• Program memory (ROM): 16 bits × 16 Ksteps
• Data memory (RAM): 4 bits × 512 words
• Instruction execution time: 1.42 µs, 40 µs, 91.6 µs, TOSC × 3 (Every instruction consists of a single word.)
• Crystal oscillator frequency: 16.9344 MHz, 75 kHz, 32.768 kHz, external clock input
• Stack levels: 16
• AD converter: 6 bits × 4 channels
• LCD driver: 1/4 duty, 1/2 or 1/3 bias method, 64 segments (max)
• I/O ports: CMOS I/O ports: 26 (max)
• Timer/counter: 8 bits (timer mode, pulse width detector and measure function)
• General-purpose counter: 20 bits, 0.1 MHz to 20 MHz, Vin = 0.2 Vpp (min), input amplifier incorporated
• Serial interface module: 1 port 2 channel supporting 2/3-line method or UART
• Four buzzer types: 0.75 kHz, 1 kHz, 1.5 kHz, and 3 kHz
• Four modes: continuous, single-shot, 10 Hz intermittent, and 10 Hz intermittent at 1 Hz intervals
• Interrupts: 1 external, 3 internal (CD sub-sync, serial interface, 8-bit timer)
• Back-up mode: Four types: CD standby (CD processor stopped)
• Reset function: Power-on reset circuit, supply voltage detector (detection voltage = 1.5 V typ.)
• Multiplexed CD processor pins:
• Reliable sync pattern detection, sync signal protection and interpolation
• Built-in EFM demodulator and subcode decoder
• High-correction capability using Cross Interleave Read Solomon Code (CIRC) logical equation
• Jitter absorption capability of ± 6 frames
• Built-in 16 KB RAM
• Built-in digital output circuit
• Built-in L/R independent digital attenuator
• Bilingual audio output
• Audio output: 32fs, 48fs or 64fs selectable
• Subcode Q data is read-timing free and can be driven out in sync with audio data.
• Built-in data slicer and analog PLL (adjustment-free VCO used) circuit
• Automatic adjustment of loop gain, offset, and balance at focus servo and tracking servo
• Built-in RF gain auto-adjusting circuit
• Built-in digital equalizer for phase compensation
• Supports different pickups using on-chip digital equalizer coefficient RAM.
• Built-in focus and tracking servo control circuit
• Search control supports all modes and realizes high-speed, stable search.
• Lens kick and feed kick use speed control method.
• Built-in AFC and APC circuits for disc motor CLV servo
• Built-in defect/shock detector
• Built-in 8 times over-sampling digital filter and 1-bit DA converter
• Built-in analog filter for 1-bit DA converter
4-bit Microcontroller
CD Processor
(two input channels)
C1 correction: dual
C2 correction: quadruple
Each of the following pins can be switched by program to a CD processor-dedicated pin:
DSP output: BCK, LRCK, AOUT, DOUT, IPF, SBOK, CLCK, DATA, and SFSY pins.
DAC input: DACin, BCKin, and LRCKin pins.
Note: BCKin and LRCKin are switched as a pair. A CD command is used to specify DAC input settings.
N-channel open-drain I/O ports (for up to 5.5 V): 3 (max)
Clock stop (oscillator stopped)
Hardware wait (only crystal oscillator in operation)
Software wait (CPU in intermittent operation)
2
TC94A58FG
2005-12-7

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