tc94a58fg TOSHIBA Semiconductor CORPORATION, tc94a58fg Datasheet - Page 9

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tc94a58fg

Manufacturer Part Number
tc94a58fg
Description
Single-chip Cd Processor With Built-in Controller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
Pin
No.
10
11
12
13
14
15
16
P1-1/SDIO1
P7-1/SDIO2
P1-3/BUZR
P1-0/SCK1
P7-0/SCK2
P7-2/INTR
(BRK10)
(BRK11)
P1-2/SI1
(BRK12)
(BRK13)
(BRK14)
(BRK15)
(BRK16)
Symbol
/DATA
/SFSY
/SBSY
/CTin
/RX1
/RX2
/TX1
/TX2
/SI2
/serial transmit data 1
/serial transmit data 2
/serial receive data 1
/serial receive data 2
/counter clock input
/serial data input 1
/serial data input 2
/CD processor
/CD processor
/CD processor
/buzzer output
/interrupt input
input/output 1
input/output 1
input/output 2
input/output 2
/serial clock
/serial clock
I/O port 1-0
I/O port 1-1
I/O port 1-2
I/O port 1-3
I/O port 7-0
I/O port 7-1
I/O port 7-2
/serial data
/serial data
Pin Name
function
function
function
The P1-0 pin has multiplexed functions for
general-purpose counter input. The input
frequency is 0.1 MHz to 20 MHz. The counter
incorporates an input amplifier and operates
with capacitance-coupled small amplitudes. The
counter is a 20-bit counter and can store 20-bit
data directly in memory. The gate time can be
selected from among 1 ms, 4 ms, 16 ms and 64
ms (when the 75-kHz crystal oscillator is used).
In manual mode, the gate can be turned on and
off within the specified time using instructions.
The P1-0 to P1-2 and P7-0 to P7-2 pins have
multiplexed functions for serial interface (SIO)
circuit input/output pins.
The SIO is a serial interface supporting 2-line
and 3-line methods as well as UART. The
TC94A58FG has CMOS input/output pins
(SCK1/RX1, SDIO1/TX1, SI1) and N-channel
open-drain (supporting up to 5.5 V) input/output
pins (SCK2/RX2, SDIO2/TX2, SI2). One of the
two sets of pins can be selected as serial
interface. The serial interface circuit supports
various options, including the number of the
clock edge to be used, the serial clock
input/output, and the clock frequency. These
options facilitate controlling the LSI and
communications between the controllers. When
SIO interrupts are enabled, an interrupt is
generated as soon as execution of the SIO
completes, causing the program to jump to
address 4.
The P1-3 pin has multiplexed functions for a
buzzer output pin. One of four frequencies
within the range from 0.75 kHz, 1 kHz, 1.5 kHz
and 3 kHz can be selected for buzzer output
(when the 75-kHz clock is used). The buzzer is
driven at the selected frequency in one of four
modes: continuous, single-shot, 10-Hz
intermittent, and 10-Hz intermittent at 1-Hz
intervals.
The P7-2 pin has multiplexed functions for an
external interrupt input pin. When interrupts are
enabled and a pulse of 1.65 µ s to 4.96 µ s or
more (13.3 µ s to 40 µ s when the 75-kHz clock is
used) is applied to this pin, an interrupt is
generated and the program jumps to address 1.
The input logic and rising/falling edge can be
selected for interrupt inputs. This input can be
applied as the clock gate signal to the internal
8-bit timer/counter, which allows input pulse
width to be detected and measured.
(Note) Backup release is enabled or disabled
(Note) Upon a system reset, the pins are set to
(Note) When the 32.768-kHz crystal oscillator
in port units.
I/O port input.
or the CR oscillator is used, the
general-purpose counter is used as a
timer.
Function and Operation
9
instruction
instruction
Release
Release
CTin
enable
enable
(When used for I/O port)
general-purpose counter)
Input
Input
(When P1-0 is used for
Remarks
TC94A58FG
R
2005-12-7
fIN
MV
MV
MV
MV
SS
MV
MV
DD
MV
DD
DD
DD
SS
SS

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