at32uc3b0512-z2ues ATMEL Corporation, at32uc3b0512-z2ues Datasheet - Page 470
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at32uc3b0512-z2ues
Manufacturer Part Number
at32uc3b0512-z2ues
Description
32-bit Avr Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT32UC3B0512-Z2UES.pdf
(680 pages)
- Current page: 470 of 680
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32059J–12/2010
UNDERFI: Underflow Interrupt
TXOUTI: Transmitted OUT Data Interrupt
RXINI: Received IN Data Interrupt
This bit is set, for isochronous and Interrupt IN/OUT pipe, when an error flow occurs. This triggers an interrupt if the UNDERFIE
This bit is set, for Isochronous or interrupt OUT pipe, when a transaction underflow occurs in the current pipe. (the pipe can’t
This bit is set, for Isochronous or interrupt IN pipe, when a transaction flow error occurs in the current pipe. i.e, the current bank
This bit is cleared when the UNDERFIEC bit is written to one.
This bit is set when the current OUT bank is free and can be filled. This triggers an interrupt if the TXOUTE bit is one.
This bit is cleared when the TXOUTIC bit is written to one.
This bit is set when a new USB message is stored in the current bank of the pipe. This triggers an interrupt if the RXINE bit is
This bit is cleared when the RXINIC bit is written to one.
bit is one.
send the OUT data packet in time because the current bank is not ready). A zero-length-packet (ZLP) will be sent instead of.
of the pipe is not free whereas a new IN USB packet is received. This packet is not stored in the bank. For Interrupt pipe, the
overflowed packet is ACKed to respect the USB standard.
one.
AT32UC3B
470
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