p89lpc9351 NXP Semiconductors, p89lpc9351 Datasheet - Page 53

• Manufacturer Part Number: p89lpc9351
• Description: 8-bit Microcontroller With Accelerated Two-clock 80c51 Core 8 Kb 3 V Byte-erasable ?ash With 8-bit Adc
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89LPC9351_1
Preliminary data sheet
8.6.6 Single step mode
8.7.1 Timer triggered start
8.7.2 Start immediately
8.7.3 Edge triggered
8.7.4 Dual start immediately
8.7 Conversion start modes
8.8 Boundary limits interrupt
ADxDAT2. The second channel is again converted and its result placed in ADxDAT3. An
interrupt is generated, if enabled, after every set of four conversions (two conversions per
channel).
In dual channel mode, the PGA channel selection is independent and can be different to
A/D conversion channel selection. If different, the gain of the selected ADC channel is 1.
This special mode allows ‘single-stepping’ in an auto scan conversion mode. Any
combination of the four input channels can be selected for conversion. After each channel
is converted, an interrupt is generated, if enabled, and the A/D waits for the next start
condition. May be used with any of the start modes.
In Single step mode, the PGA channel selection is independent and can be different to
A/D conversion channel selection. If different, the gain of the selected ADC channel is 1.
An A/D conversion is started by the overflow of Timer 0. Once a conversion has started,
additional Timer 0 triggers are ignored until the conversion has completed. The Timer
triggered start mode is available in all ADC operating modes.
Programming this mode immediately starts a conversion. This start mode is available in all
ADC operating modes.
An A/D conversion is started by rising or falling edge of P1.4. Once a conversion has
started, additional edge triggers are ignored until the conversion has completed. The edge
triggered start mode is available in all ADC operating modes.
Programming this mode starts a synchronized conversion of both A/D converters. This
start mode is available in all A/D operating modes. Both A/D converters must be in the
same operating mode. In the continuous conversion modes, both A/D converters must
select an identical number of channels. Any trigger of either A/D will start a simultaneous
conversion of both A/Ds.
Each of the ADCs has both a high and low boundary limit register. After the four MSBs
have been converted, these four bits are compared with the four MSBs of the boundary
high and low registers. If the four MSBs of the conversion are outside the limit an interrupt
will be generated, if enabled. If the conversion result is within the limits, the boundary
limits will again be compared after all 8 bits have been converted. An interrupt will be
generated, if enabled, if the result is outside the boundary limits. The boundary limit may
be disabled by clearing the boundary limit interrupt enable.
Rev. 01 — 19 November 2008
8-bit microcontroller with 8-bit ADC
P89LPC9351
© NXP B.V. 2008. All rights reserved.
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