p89lpc9171fdh NXP Semiconductors, p89lpc9171fdh Datasheet - Page 45

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p89lpc9171fdh

Manufacturer Part Number
p89lpc9171fdh
Description
8-bit Microcontroller With Accelerated Two-clock 80c51 Core, 2 Kb 3 V Byte-erasable Flash With 8-bit Adc
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
P89LPC9151_61_71_2
Product data sheet
7.15.1.2 Open-drain output configuration
7.15.1.3 Input-only configuration
7.15.1.4 Push-pull output configuration
7.15.2 Port 0 analog functions
7.15.3 Additional port features
LOW, it is driven strongly and able to sink a fairly large current. These features are
somewhat similar to an open-drain output except that there are three pull-up transistors in
the quasi-bidirectional output that serve different purposes.
The P89LPC9151/9161/9171 is a 3 V device, but the pins are 5 V tolerant. In
quasi-bidirectional mode, if a user applies 5 V on the pin, there will be a current flowing
from the pin to V
quasi-bidirectional mode is discouraged.
A quasi-bidirectional port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
The open-drain output configuration turns off all pull-ups and only drives the pull-down
transistor of the port driver when the port latch contains a logic 0. To be used as a logic
output, a port configured in this manner must have an external pull-up, typically a resistor
tied to V
An open-drain port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
The input-only port configuration has no output drivers. It is a Schmitt trigger input that
also has a glitch suppression circuit.
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a port output. A push-pull port pin has a
Schmitt triggered input that also has a glitch suppression circuit. The
P89LPC9151/9161/9171 device has high current source on eight pins in push-pull mode.
See
The P89LPC9151/9161/9171 incorporates two Analog Comparators. In order to give the
best analog function performance and to minimize power consumption, pins that are being
used for analog functions must have the digital outputs and digital inputs disabled.
Digital outputs are disabled by putting the port output into the Input-Only
(high-impedance) mode.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register, bits 1:5.
On any reset, PT0AD[1:5] defaults to logic 0s to enable digital functions.
After power-up, all pins are in Input-Only mode. Please note that this is different from
the LPC76x series of devices.
After power-up, all I/O pins except P1.5, may be configured by software.
Pin P1.5 is input only. Pins P1.2 and P1.3 are configurable for either input-only or
open-drain.
Table 15 “Limiting
DD
.
DD
, causing extra power consumption. Therefore, applying 5 V in
Rev. 02 — 9 February 2010
values”.
P89LPC9151/9161/9171
8-bit microcontroller with 8-bit ADC
© NXP B.V. 2010. All rights reserved.
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