c8051t617 Silicon Laboratories, c8051t617 Datasheet - Page 10
c8051t617
Manufacturer Part Number
c8051t617
Description
Mixed Signal Byte-programmable Eprom Mcu
Manufacturer
Silicon Laboratories
Datasheet
1.C8051T617.pdf
(210 pages)
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C8051T610/1/2/3/4/5/6/7
List of Tables
1. System Overview
2. Absolute Maximum Ratings
3. Global DC Electrical Characteristics
4. Pinout and Package Definitions
5. ADC0 - 10-Bit SAR ADC (C8051T610/1/2/3/6 Only)
6. Voltage Reference Options
7. Comparators
8. Voltage Regulator (REG0)
9. CIP-51 Microcontroller
10. Reset Sources
11. EPROM Program Memory
12. External RAM
13. Oscillators
14. Port Input/Output
15. SMBus
16. UART0
10
Table 1.1. Product Selection Guide ......................................................................... 16
Table 2.1. Absolute Maximum Ratings* .................................................................. 28
Table 3.1. Global DC Electrical Characteristics ....................................................... 29
Table 3.2. Electrical Characteristics Quick Reference ............................................ 30
Table 4.1. Pin Definitions for the C8051T61x .......................................................... 31
Table 4.2. LQFP-32 Package Dimensions .............................................................. 34
Table 4.3. QFN-28 Package Dimensions ................................................................ 36
Table 4.4. QFN-24 Package Dimensions ................................................................ 40
Table 5.1. ADC0 Electrical Characteristics .............................................................. 58
Table 6.1. External Voltage Reference Circuit Electrical Characteristics ................ 61
Table 7.1. Comparator Electrical Characteristics .................................................... 71
Table 8.1. Internal Voltage Regulator Electrical Characteristics ............................. 73
Table 9.1. CIP-51 Instruction Set Summary ............................................................ 76
Table 9.2. Special Function Register (SFR) Memory Map ...................................... 82
Table 9.3. Special Function Registers ..................................................................... 83
Table 9.4. Interrupt Summary .................................................................................. 91
Table 10.1. User Code Space Address Limits ....................................................... 103
Table 10.2. Reset Electrical Characteristics .......................................................... 105
Table 11.1. EPROM Electrical Characteristics ...................................................... 106
Table 11.2. Security Byte Decoding ...................................................................... 107
Table 13.1. Internal Oscillator Electrical Characteristics ....................................... 112
Table 14.1. Port I/O DC Electrical Characteristics ................................................ 130
Table 15.1. SMBus Clock Source Selection .......................................................... 136
Table 15.2. Minimum SDA Setup and Hold Times ................................................ 137
Table 15.3. Sources for Hardware Changes to SMB0CN ..................................... 141
Table 15.4. SMBus Status Decoding ..................................................................... 147
Table 16.1. Timer Settings for Standard Baud Rates
Rev. 0.3
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