c8051t617 Silicon Laboratories, c8051t617 Datasheet - Page 182

• Manufacturer Part Number: c8051t617
• Description: Mixed Signal Byte-programmable Eprom Mcu
• Manufacturer: Silicon Laboratories

C8051T610/1/2/3/4/5/6/7
SFR Definition 18.12. TMR2H Timer 2 High Byte
18.3. Timer 3
Timer 3 is a 16-bit timer formed by two 8-bit SFRs: TMR3L (low byte) and TMR3H (high byte). Timer 3 may
operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode. The T3SPLIT bit (TMR3CN.3) defines
the Timer 3 operation mode.
Timer 3 may be clocked by the system clock, the system clock divided by 12, or the external oscillator
source divided by 8. The external clock mode is ideal for real-time clock (RTC) functionality, where the
internal oscillator drives the system clock while Timer 3 (and/or the PCA) is clocked by an external preci-
sion oscillator. Note that the external oscillator source divided by 8 is synchronized with the system clock.
18.3.1. 16-bit Timer with Auto-Reload
When T3SPLIT (TMR3CN.3) is zero, Timer 3 operates as a 16-bit timer with auto-reload. Timer 3 can be
clocked by SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the
16-bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 3
reload registers (TMR3RLH and TM32RLL) is loaded into the Timer 3 register as shown in Figure 18.4,
and the Timer 3 High Byte Overflow Flag (TMR3CN.7) is set. If Timer 3 interrupts are enabled, an interrupt
will be generated on each Timer 3 overflow. Additionally, if Timer 3 interrupts are enabled and the TF3LEN
bit is set (TMR3CN.5), an interrupt will be generated each time the lower 8 bits (TMR3L) overflow from
0xFF to 0x00.
182
External Clock / 8
Bits 7–0: TMR2H: Timer 2 High Byte.
SYSCLK / 12
R/W
Bit7
SYSCLK
In 16-bit mode, the TMR2H register contains the high byte of the 16-bit Timer 2. In 8-bit
mode, TMR2H contains the 8-bit high byte timer value.
T3XCLK
R/W
Bit6
0
1
Figure 18.6. Timer 3 16-Bit Mode Block Diagram
M
H
T
3
M
T
3
L
CKCON
M
H
T
2
R/W
T
M
0
1
Bit5
2
L
M
T
1
M
T
0
C
S
A
1
S
C
A
0
TR3
R/W
Bit4
TCLK
Rev. 0.3
R/W
Bit3
TMR3RLL TMR3RLH
TMR3L
TMR3H
R/W
Bit2
Reload
R/W
Bit1
To ADC
T3SPLIT
TF3LEN
T3XCLK
TF3H
TF3L
TR3
R/W
Bit0
SFR Address:
00000000
Reset Value
0xCD
Interrupt