c8051t617 Silicon Laboratories, c8051t617 Datasheet - Page 50
c8051t617
Manufacturer Part Number
c8051t617
Description
Mixed Signal Byte-programmable Eprom Mcu
Manufacturer
Silicon Laboratories
Datasheet
1.C8051T617.pdf
(210 pages)
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C8051T610/1/2/3/4/5/6/7
5.6.3. Settling Time Requirements
A minimum amount of tracking time is required before each conversion can be performed, to allow the
sampling capacitor voltage to settle. This tracking time is determined by the AMUX0 resistance, the ADC0
sampling capacitance, any external source resistance, and the accuracy required for the conversion. Note
that in low-power tracking mode, three SAR clocks are used for tracking at the start of every conversion.
For many applications, these three SAR clocks will meet the minimum tracking time requirements, and
higher values for the external source impedance will increase the required tracking time.
Figure 5.5 shows the equivalent ADC0 input circuit. The required ADC0 settling time for a given settling
accuracy (SA) may be approximated by Equation 5.1. See Table 5.1 for ADC0 minimum settling time
(track/hold time) requirements.
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R
n is the ADC resolution in bits (10).
50
TOTAL
is the sum of the AMUX0 resistance and any external source resistance.
Equation 5.1. ADC0 Settling Time Requirements
Figure 5.5. ADC0 Equivalent Input Circuits
Note: When the PGA gain is set to 0.5, C
t
P0.x
=
ln
RC
⎛
⎝
MUX Select
------ -
SA
2
Input
n
= R
⎞
⎠
×
MUX
Rev. 0.3
R
R
* C
MUX
TOTAL
SAMPLE
= 5k
C
SAMPLE
C
SAMPLE
SAMPLE
= 5pF
= 3pF
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