mcimx50 Freescale Semiconductor, Inc, mcimx50 Datasheet - Page 3

• Manufacturer Part Number: mcimx50
• Description: I.mx50 Applications Processors For Consumer Products
• Manufacturer: Freescale Semiconductor, Inc

1.1.5
The multilevel memory system of the i.MX50 is based on the L1 instruction and data caches, L2 cache,
and internal and external memory. The i.MX50 supports many types of external memory devices,
including DDR2, LPDDR2, LPDDR1, NOR Flash, PSRAM, Cellular RAM, NAND Flash (MLC and
SLC) and OneNAND™, and managed NAND including eMMC up to rev 4.4.
1.1.6
The i.MX50 device has power management throughout the SOC that enables the rich suite of multimedia
features and peripherals to consume minimum power in both active and various low power modes. Smart
Speed technology enables the designer to deliver a feature-rich product that requires levels of power that
are far less than industry expectations.
1.1.7
The i.MX50 supports connection to a variety of interfaces, including an LCD controller for displays, two
high-speed USB on-the-go-capable PHYs, multiple expansion card ports (high-speed MMC/SDIO host
and others), 10/100 Ethernet controller, and a variety of other popular interfaces (for example, UART, I
and I
1.1.8
The i.MX50 delivers hardware-enabled security features, such as High-Assurance Boot 4 (HAB4) for
signed/authenticated firmware images, basic DRM support with random private keys and AES
encryption/decryption, and storage and programmability of on-chip fuses.
1.2
The i.MX50 Application Processor (AP) is based on ARM Cortex-A8 platform and has the following
features:
Freescale Semiconductor
•
•
•
•
•
2
S serial audio).
rotation. The ePXP is enhanced with features specifically for grayscale applications working in
conjunction with the electrophoretic display controller to form a full grayscale display solution. In
addition, the ePXP supports traditional pixel/frame processing paths for still-image and video
processing applications, allowing it to interface with the integrated LCD controller (eLCDIF).
Graphics acceleration
The i.MX50 provides a 2D graphics accelerator with performance up to 200 Mpix/s.
MMU, L1 instruction cache, and L1 data cache
Unified L2 cache
800 MHz target frequency of the core (including NEON, VFPv3, and L1 cache)
NEON coprocessor (SIMD Media Processing Architecture) and Vector Floating Point (VFP-Lite)
coprocessor supporting VFPv3
Features
Multilevel Memory System
Smart Speed™ Technology
Interface Flexibility
Advanced Security
i.MX50 Applications Processors for Consumer Products, Rev. 0
Introduction
2
C,
3