mcimx50 Freescale Semiconductor, Inc, mcimx50 Datasheet - Page 78
mcimx50
Manufacturer Part Number
mcimx50
Description
I.mx50 Applications Processors For Consumer Products
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCIMX50.pdf
(120 pages)
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Electrical Characteristics
4.9.4.3
In RMII mode, FEC_TX_CLK is used as the REF_CLK which is a 50 MHz ± 50 ppm continuous
reference clock. FEC_RX_DV is used as the CRS_DV in RMII, and other signals under RMII mode
include FEC_TX_EN, FEC_TXD[1:0], FEC_RXD[1:0] and optional FEC_RX_ER.
The RMII mode timings are shown in
78
M14 FEC_MDC pulse width high
M15 FEC_MDC pulse width low
ID
M16
M17
M18
M19
M20
M21
No.
FEC_MDIO (output)
FEC_MDC (output)
FEC_MDIO (input)
REF_CLK(FEC_TX_CLK) pulse width high
REF_CLK(FEC_TX_CLK) pulse width low
REF_CLK to FEC_TXD[1:0], FEC_TX_EN invalid
REF_CLK to FEC_TXD[1:0], FEC_TX_EN valid
FEC_RXD[1:0], CRS_DV(FEC_RX_DV), FEC_RX_ER to
REF_CLK setup
REF_CLK to FEC_RXD[1:0], FEC_RX_DV, FEC_RX_ER hold
RMII Mode Timing
Figure 39. RMII Serial Management Channel Timing Diagram
i.MX50 Applications Processors for Consumer Products, Rev. 0
Table 54. RMII Transmit Signal Timing (continued)
Characteristics
Characteristics
Table 55
Table 55. RMII Signal Timing
M12
M13
and
Figure
M14
40.
35%
35%
M10
Min
—
2
4
2
M11
M15
65%
65%
Max
16
—
—
—
40% 60% FEC_MDC period
40% 60% FEC_MDC period
Min Max
REF_CLK period
REF_CLK period
ns
ns
ns
ns
Freescale Semiconductor
Unit
Unit