mcimx50 Freescale Semiconductor, Inc, mcimx50 Datasheet - Page 65

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mcimx50

Manufacturer Part Number
mcimx50
Description
I.mx50 Applications Processors For Consumer Products
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Freescale Semiconductor
1
2
3
4
5
6
7
8
WE34 EIM_RW invalid to EIM_CSx
WE35 EIM_CSx valid to EIM_OE valid WE10 – WE6 + (OEA – CSA)
WE36 EIM_OE invalid to EIM_CSx
WE37 EIM_CSx valid to EIM_EBx
WE38 EIM_EBx invalid to EIM_CSx
WE39 EIM_CSx valid to EIM_LBA
WE40 EIM_LBA invalid to EIM_CSx
WE41 EIM_CSx valid to Output Data
WE42 Output Data invalid to EIM_CSx
WE43 Input Data valid to EIM_CSx
WE44 EIM_CSx invalid to Input Data
WE45 EIM_CSx valid to EIM_EBx
WE46 EIM_EBx invalid to EIM_CSx
WE47 EIM_DTACK valid to EIM_CSx
WE48 EIM_CSx invalid to
Parameters WE4–WE21 value, see in the
EIM_CSx Assertion. This bit field determines when EIM_CSx signal is asserted during read/write cycles.
EIM_CSx Negation. This bit field determines when EIM_CSx signal is negated during read/write cycles.
EIM_EBx Assertion. This bit field determines when EIM_EBx signal is asserted during read cycles.
EIM_EBx Negation. This bit field determines when EIM_EBx signal is negated during read cycles.
Output maximum delay from internal driving the FFs to chip outputs. The maximum delay between all memory controls
(EIM_ADDR, EIM_CSx, EIM_OE, EIM_RW, EIM_EBx, and EIM_LBA).
Maximum delay from chip input data to internal FFs. The maximum delay between all data input pins.
DTACK maximum delay from chip input data to internal FF.
ID
Table 41. EIM Asynchronous Timing Parameters Table Relative Chip Select (continued)
invalid
invalid
valid (Read access)
invalid (Read access)
valid
invalid (ADVL is asserted)
valid
invalid
invalid
invalid
valid (Write access)
invalid (Write access)
invalid
EIM_DTACK invalid
Parameter
i.MX50 Applications Processors for Consumer Products, Rev. 0
WE7 – WE9 + (WEN – CSN)
WE7 – WE11 + (OEN – CSN)
WE12 – WE6 + (RBEA – CSA)
WE7 – WE13 + (RBEN – CSN)
WE14 – WE6 + (ADV – CSA)
WE7 – WE15 – CSN
WE16 – WE6 – WCSA
WE17 – WE7 – CSN
WE7 – WE13 + (WBEN – CSN)
WE12 – WE6 + (WBEA – CSA)
Synchronous Measured
Table
MAXCO + MAXDTI
Determination by
MAXCO + MAXDI
Parameters
41.
0
0
1
MAXCO
MAXCO
MAXDI
XDTI
Min
0
0
6
8
+ MA
6
7
+
–3 + (WBEN – CSN)
3 + (RBEA
3 – (RBEN
3 + (WBEA – CSA)
3 + (ADVA – CSA)
3 + (OEA – CSA)
3 – (OEN – CSN)
3 – (WEN_CSN)
Electrical Characteristics
3 – WCSA
3 – CSN
3 – CSN
Max
4
5
– CSN)
– CSA)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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