mcimx50 Freescale Semiconductor, Inc, mcimx50 Datasheet - Page 67

• Manufacturer Part Number: mcimx50
• Description: I.mx50 Applications Processors For Consumer Products
• Manufacturer: Freescale Semiconductor, Inc

4.8.2
The following diagrams and tables specify the timings related to the address and command pins, which
interface LPDDR2 memory devices.
Freescale Semiconductor
DDR3
DDR4
DDR5
DDR1
DDR2
DDR3
DDR4
ID
ID
DRAM Command and Address Output Timing—LPDDR2
DRAM_SDCLK_B
DRAM_SDCLK
DRAM_CS0
DRAM_A[9:0]
CK low level width
Address and control output setup time
Address and control output hold time
CK cycle time
CK high level width
CK low level width
Control output setup time
Figure 29. DRAM Command/Address Output Timing—LPDDR2
i.MX50 Applications Processors for Consumer Products, Rev. 0
Table 42. EMI Command/Address AC Timing (continued)
Description
Description
Table 43. EMI Command/Address AC Timing
DDR4
rise fall
DDR5
DDR6
Symbol
Symbol
DDR7
tCH
tCK
tCL
tCL
tIS
tIH
tIS
DDR2
0.48 tCK
0.48 tCK
0.48 tCK
0.5 tCK
0.5 tCK
0.5 tCK
- 0.3
- 0.3
- 0.3
3.75
Min
Min
DDR1
0.52 tCK
0.52 tCK
0.52 tCK
Max
Max
—
—
—
—
Electrical Characteristics
DDR3
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
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