78q8430-100igt Maxim Integrated Products, Inc., 78q8430-100igt Datasheet - Page 62

• Manufacturer Part Number: 78q8430-100igt
• Description: 10/100 Ethernet Mac And Phy
• Manufacturer: Maxim Integrated Products, Inc.

78Q8430 Data Sheet
7.6.11 Receive Data Status Register
7.6.12 BIST Control Register
62
Name: RDSR
Bits
31:25
24
23:17
16
15:2
1:0
Name: BCR
Bits
31
30
29
28:21
20
19
18:16
15:14
13:0
Type
Type
R/W
R/W
R/W
R/W
W
R
R
R
R
R
Default
Default
0x000
Reset Val: 0x0001_0000
Reset Val: 0x2010_0000
00b
000
0
1
0
1
1
Description
Reserved
EOF
When set this bit indicates that the next data word read from QUE0 will
be the end of its frame.
Reserved
QUE0 Empty
When set this bit indicates that QUE0 contains no data.
Reserved
QUE0 Data Size
The number of valid bytes in the next data word read from QUE0.
Description
BIST Start
Writing a 1 to this bit triggers the selected BIST test (see BIST Mode
below).
Fail
The BIST operation failed.
Pass
The BIST operation passed.
Reserved
Auto Increment
When set, the RAM Address field will auto-increment after each RAM
access.
BIST Enable
Enable BIST mode operation.
BIST Mode
Set the BIST test mode:
000b – Reserved.
001b – PATTERN.
010b – FILL 0.
011b – READ 0.
100b – FILL 1.
101b – READ 1.
110b – BYPASS.
111b – Reserved.
Reserved
RAM Address
Set the address of the RAM that is accessed via BBDR in BYPASS
mode.
Block: CTL
Block: CTL
Address: 0x134
Address: 0x138
DS_8430_001
Rev. 1.2