xr17v258 Exar Corporation, xr17v258 Datasheet - Page 51
xr17v258
Manufacturer Part Number
xr17v258
Description
66mhz Pci Bus Octal Uart With Power Management Support
Manufacturer
Exar Corporation
Datasheet
1.XR17V258.pdf
(70 pages)
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xr
REV. 1.0.0
MSR[1]: Delta DSR# Input Flag
•
•
MSR[0]: Delta CTS# Input Flag
•
•
The upper four bits [7:4] of this register set the delay in number of bits time for the auto RS-485 turn around
from transmit to receive.
MSR [7:4]
When Auto RS485 feature is enabled (FCTR bit [5]=1) and RTS# output is connected to the enable input of a
RS-485 transceiver. These 4 bits select from 0 to 15 bit-time delay after the end of the last stop-bit of the last
transmitted character. This delay controls when to change the state of RTS# output. This delay is very useful in
long-cable networks.
5.11
Logic 0 = No change on DSR# input (default).
Logic 1 = The DSR# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit [3]).
Logic 0 = No change on CTS# input (default).
Logic 1 = The CTS# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit [3]).
T
Modem Status Register (MSR) - Write Only
ABLE
18: A
UTO
Table 18
MSR[7]
RS485 H
0
0
0
0
0
9
0
0
1
1
1
1
1
1
1
1
shows the selection. The bits are enabled by EFR bit [4].
MSR[6]
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
ALF
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
-
DUPLEX
MSR[5]
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D
IRECTION
MSR[4]
51
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
C
ONTROL
D
ELAY IN
D
ELAY FROM
D
ATA
10
12
13
14
15
11
0
1
2
3
4
5
6
7
8
9
B
IT
T
(
S
RANSMIT
) T
IME
-
TO
-R
ECEIVE
XR17V258