xr20m1280 Exar Corporation, xr20m1280 Datasheet - Page 13

• Manufacturer Part Number: xr20m1280
• Description: I2c/spi Uart With 128-byte Fifo And Integrated Level Shifters
• Manufacturer: Exar Corporation

REV. P1.1.1
The RESET# input resets the internal registers and the serial interface outputs to their default state (see
Table
device. Following a power-on reset or an external reset, the M1280 is software compatible with previous
generation of UARTs.
The M1280 can accept and withstand 5V signals on the inputs without any damage. But note that if the supply
voltage for the M1280 is at the lower end of the supply voltage range (ie. 1.8V), its V
enough to meet the requirements of the V
XTAL1 is not 5 volt tolerant.
The M1280 has a set of 16550 compatible registers for controlling, monitoring and data loading and unloading.
These registers function as data holding registers (THR/RHR), interrupt status and control registers (ISR/IER),
a FIFO control register (FCR), receive line status and control registers (LSR/LCR), modem status and control
registers (MSR/MCR), programmable data rate (clock) divisor registers (DLL/DLM/DLD), and a user accessible
scratchpad register (SPR).
Beyond the general 16C550 features and capabilities, the M1280 offers enhanced feature registers (EFR,
Xon1/Xoff1, Xon2/Xoff2, DLD, FCTR, EMSR, FC and TRIG, SFR, SHR, GPIOINT, GPIO3T, GPIOINV,
GPIOSEL) that provide automatic RTS and CTS hardware flow control, automatic Xon/Xoff software flow
control, 9-bit (Multidrop) mode, auto RS-485 half duplex control, different baud rate for TX and RX and
fractional baud rate generator. All the register functions are discussed in full detail later in
INTERNAL REGISTERS” on page
The IRQ# interrupt output changes according to the operating mode and enhanced features setup.
and 5
1.3
1.4
1.5
1.6
IRQ# Pin
IRQ# Pin
21). An active low pulse of longer than 40 ns duration will be required to activate the reset function in the
summarize the operating behavior for the transmitter and receiver. Also see
Device Reset
5-Volt Tolerant Inputs
Internal Registers
IRQ# Ouput
IRQ# Pin
Auto RS485
Mode
YES
NO
HIGH = One byte in THR
LOW = RHR empty
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
T
HIGH = One byte in THR
LOW = THR empty
HIGH = One byte in THR
LOW = THR empty
ABLE
T
ABLE
(FIFO D
FCR B
27.
(FIFO D
4: IRQ# P
FCR B
5: IRQ# P
IT
ISABLED
IH
-0 = 0
IT
ISABLED
of a CPU or a serial transceiver that is operating at 5V. Caution:
-0 = 0
IN
)
IN
PRELIMINARY
O
)
PERATION FOR
O
PERATION FOR
13
HIGH = FIFO above trigger level
LOW = FIFO above trigger level or RX Data Timeout
HIGH = FIFO above trigger level
LOW = FIFO below trigger level or FIFO empty
HIGH = FIFO above trigger level
LOW = FIFO below trigger level or FIFO empty
T
RANSMITTER
R
ECEIVER
(FIFO E
FCR B
(FIFO E
FCR B
Figure 33
IT
NABLED
IT
NABLED
-0 = 1
-0 = 1
OH
“Section 2.0, UART
)
)
XR20M1280
may not be high
through 35.
Table 4