xr20m1280 Exar Corporation, xr20m1280 Datasheet - Page 36

• Manufacturer Part Number: xr20m1280
• Description: I2c/spi Uart With 128-byte Fifo And Integrated Level Shifters
• Manufacturer: Exar Corporation

XR20M1280
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
LCR[2]: TX and RX Stop-bit Length Select
The length of stop bit is specified by this bit in conjunction with the programmed word length.
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See
•
•
LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit-3 set to a logic 1, LCR BIT-4 selects the even or odd parity format.
•
•
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
•
•
•
Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
Logic 0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format (default).
Logic 1 = EVEN Parity is generated by forcing an even number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format.
LCR BIT-5 = logic 0, parity is not forced (default).
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit is forced to a logical 1 for the transmit and receive
data.
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit is forced to a logical 0 for the transmit and receive
data.
Table 14
LCR B
X
0
0
1
1
for parity selection summary below.
IT
BIT-2
-5 LCR B
0
1
1
X
0
1
0
1
T
ABLE
IT
-4 LCR B
LENGTH
5,6,7,8
W
PRELIMINARY
6,7,8
ORD
14: P
5
0
1
1
1
1
ARITY SELECTION
IT
36
-3
Forced parity to space, LOW
Force parity to mark, HIGH
S
TOP BIT LENGTH
(B
P
1 (default)
ARITY SELECTION
IT TIME
1-1/2
Even parity
Odd parity
No parity
2
(
S
))
REV. P1.1.1