wm8961 Wolfson Microelectronics plc, wm8961 Datasheet - Page 15

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wm8961

Manufacturer Part Number
wm8961
Description
Ultra-low Power Stereo Codec With 1w Stereo Class D Speaker Drivers And Ground Referenced Headphone Drivers
Manufacturer
Wolfson Microelectronics plc
Datasheet
AUDIO INTERFACE TIMING – SLAVE MODE
w
WM8961
Figure 3 Digital Audio Data Timing – Slave Mode
Note:
BCLK period should always be greater than or equal to MCLK period.
Test Conditions
MICVDD=2.5V, DVDD = CPVDD=AVDD =1.8V SPKVDD1 = SPKVDD2 = 5V,
DGND=AGND=CPGND=SPKGND1=SPKGND2=0V,
T
PARAMETER
Audio Data Input Timing Information
LRC propagation delay from BCLK falling edge
ADCDAT propagation delay from BCLK falling edge
DACDAT setup time to BCLK rising edge
DACDAT hold time from BCLK rising edge
Test Conditions
MICVDD=2.5V, DVDD = CPVDD=AVDD =1.8V SPKVDD1 = SPKVDD2 = 5V,
DGND=AGND=CPGND=SPKGND1=SPKGND2=0V,
T
PARAMETER
Audio Data Input Timing Information
BCLK cycle time
BCLK pulse width high
BCLK pulse width low
LRC set-up time to BCLK rising edge
LRC hold time from BCLK rising edge
DACDAT hold time from BCLK rising edge
ADCDAT propagation delay from BCLK falling edge
DACDAT set-up time to BCLK rising edge
A
A
=+25
=+25
o
o
C, Slave Mode, fs=48kHz, MCLK=256fs, 24-bit data, unless otherwise stated.
C, Slave Mode, fs=48kHz, MCLK= 256fs, 24-bit data, unless otherwise stated.
SYMBOL
SYMBOL
t
t
t
t
t
LRSU
t
t
t
BCY
BCH
BCL
LRH
DH
DD
DS
t
t
t
t
DDA
DST
DHT
DL
MIN
MIN
10
10
50
20
20
10
10
10
10
TYP
TYP
PP, August 2009, Rev 3.1
MAX
MAX
10
10
10
Pre-Production
UNIT
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15

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