sip11203 Vishay, sip11203 Datasheet - Page 10

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sip11203

Manufacturer Part Number
sip11203
Description
Sip11203 - Vishay Power Ics Synchronous Rectifier Driver With Power Up/down Control, Output Ovp, Error Amplifier And Precision Reference
Manufacturer
Vishay
Datasheet

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SiP11203/SiP11204
Vishay Siliconix
NORMAL DRIVER OPERATION
In normal operation, OUTA responds to INA, and
OUTB to INB. The signal path from input to output is
non-inverting. The output drivers have high and delib-
erately asymmetrical current sink and source capabili-
ties (4 A I
driving large synchronous rectifiers at the switching
frequencies found in modern power converters. At the
same time, the driver asymmetry enforces a rapid turn-
off of the rectifier MOSFETs relative to their turn-on, to
avoid rectifier crossconduction, and the low driver im-
pedances to PGND help ensure that the rectifier MOS-
FETs do not exhibit unwanted turn-on during converter
operation.
As with most logic circuits, OUTA and OUTB do not ex-
hibit indeterminate output states even the transitions at
INA and INB are excessively slow. The solid and sharp
driving signals from OUTA and OUTB will ensure the
proper function of the rectifier MOSFETs in the final
application circuit.
POWER-DOWN DRIVER OPERATION
If the timing pulses from the primary of the DC-DC con-
verter cease, the SiP11203/SiP11204 must assume
that the power to the primary of the DC-DC converter
has failed. Upon detecting this condition, the part must
put the main synchronous rectifier drivers into a “safe”
condition, and simultaneously ensure that the rectifier
MOSFETs are turned off. A unique feature of the
www.vishay.com
10
SINK
Figure 4. Soft-start parameters of the SiP11203/SiP11204 are programmable with external components
, 2.2 A I
0.9* V L
3.55 V
SOURCE
V
). The high currents allow
Internal
logic
circuits
enabled
Rate of rise determined by
external V
L
capacitor
V
released to
rise
REF
Enabled by CUVLO
Rate of rise determined by
external V
SiP11203/SiP11204 is their ability to turn off the syn-
chronous rectifiers via a controlled excursion through
their linear region. This can help to prevent output ring-
ing at turn-off.
A missing-pulses detector is provided on the IC to ini-
tiate the soft power down. This detector, which is en-
abled once the V
monitors INA and INB for lack of switching activity. An
external resistor from R
out of C
external capacitor from C
C
V
at C
for a period of R
ceed the 2.5 V comparison threshold, and the power-
down latch will be set (See Figure 6).
V
• The V
• The main drivers are forced into a high-impedance
• Internal pull-downs (current sinks) from the OUTA
• The pull-down currents on OUTA and OUTB are set
REFINT
PD
REFINT
V
V
towards 0 V, to ensure an orderly soft-start cycle
when operation resumes,
state,
and OUTB pins to ground are enabled,
by R
rectifiers.
REF
L
PD
is internally compared to the 2.5 V developed by
is reset to 0 V. However, if both inputs are high
PD
. Whenever either input goes low, the voltage
PD
REF
R
, to allow a “soft” turn-off of the synchronous
REF
(I = 2.5 V/R
capacitor
pin bypass capacitor is discharged
REF
PD
× C
pin has reached 1.1 V, continually
PD
2.5 V
PD
PD
1.225 V
), which is used to charge an
PD
5 V
, the voltage at C
to ground defines a current
to ground. The voltage on
time
S-61082–Rev. B, 19-Jun-06
Document Number: 73868
PD
will ex-

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