sip11203 Vishay, sip11203 Datasheet - Page 11

• Manufacturer Part Number: sip11203
• Description: Sip11203 - Vishay Power Ics Synchronous Rectifier Driver With Power Up/down Control, Output Ovp, Error Amplifier And Precision Reference
• Manufacturer: Vishay

POWER-DOWN DRIVER OPERATION (CONT’D)
The internal pull-downs ensure that the synchronous
rectifiers are in the off state before the bias supply to
the IC has collapsed (See Figure 5). Since these pull-
downs have a lower current-sinking capability than the
main OUTA and OUTB drivers, they can cause the rec-
tifier MOSFETs to transition from full conduction to the
off state via their linear region of operation. This soft
turn-off allows the use of the gradually increasing rec-
tifier channel impedances to help damp LC oscillations
that might otherwise occur at the converter's output.
The gate pull-down current value, and therefore the in-
terval during which the rectifier MOSFETs are in tran-
sition from fully on to fully off, is programmed by the
resistor from RPD to ground. This current is given by
I
bility allows the choice of a gate discharge time which
best accommodates the design variables of L
C
tics.
The power-down latch will be reset, and a soft-start cy-
cle will occur, when the logical and of two conditions is
true:
Note that low values of R
supply current. It is recommended that R
≥ 15 kΩ to prevent excessive power dissipation.
Document Number: 73868
S-61082–Rev. B, 19-Jun-06
PULL-DOWN
• The voltage on the V
• The exclusive-or of INA and INB is true, that is, one
prevents the synchronous MOSFET of a half-bridge converter
from discharging a prebiased output when supplied power is
OUT
of its nominal 1.225 V, and
input is in low while the other is high.
Figure 5. The shutdown sequence of SiP11203/SiP11204
OUTA/B
INA/B
, and synchronous rectifier MOSFET characteris-
C
2.5V
V
V
PD
REF
V
IN
L
=
200* V
SHUTDOW
REF
removed
REFINT
capacitor is 20 % (245 mV)
PD
will increase the main
/R
PD
. This programma-
RESTART
PD
be kept
OUT
,
SYNCHRONOUS RECTIFIER PHASE-IN AND
RISING EDGE DELAY
The SiP11203/SiP11204 has the ability to “phase in”
the synchronous rectifiers at start-up. This causes the
rectifier MOSFETs to initially be used as conventional
PN (or Schottky) diodes, then as synchronous rectifi-
ers for an increasing percentage of each switching cy-
cle, until finally they are operating completely as
synchronous switches. When this feature of the IC is
used, the resistance R
tween the R
required for the transition from diode-mode operation
to fully synchronous rectification.
To achieve this phase-in of the synchronous rectifiers,
an internally extended propagation delay (ΔT
troduced between the rising edge of each input (INA or
INB) and the rising edge of the corresponding output
(OUTA or OUTB). The length of this delay is propor-
tional to R
ΔT
Therefore ΔT
during which V
ing converter start-up or a SiP11203/SiP11204 soft-
start event). When the phase-in period has ended, the
final high-going propagation delay is T
+ T
in the typical curves.
DEL
DEL(FINAL)
Figure 6. Power Down Detect and “Soft” Turn-Off
≅ (1.5 ns x R
DEL
DEL
= T
DEL
REF
and inversely proportional to V
pdr
pin and ground, determines the time
decreases throughout the interval
is rising (i.e., during the time follow-
+ [(1.5 ns x R
SiP11203/SiP11204
DEL
DEL
x 1.225 V)/(1 kΩ x V
, which is connected be-
Vishay Siliconix
DEL
)/1 kΩ)], as shown
DEL(FINAL)
www.vishay.com
DEL
) is in-
= T
REF
REF
pdr
11
).
: