wm8400 Wolfson Microelectronics plc, wm8400 Datasheet - Page 107

• Manufacturer Part Number: wm8400
• Description: Wolfson Audioplustm Hi-fi Audio Codec And Power Management Unit For Mobile Multimedia
• Manufacturer: Wolfson Microelectronics plc

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Pre-Production
Table 66 Temperature Sensor GPIO Control
FLL LOCK OUTPUT
The WM8400 maintains a flag indicating the lock status of the FLL, which may be used to control
other events if required. The FLL Lock status may be output directly on a GPIO pin, and may also be
used to generate CODEC Interrupt events. Configuration of the GPIO pins for output of the FLL Lock
flag is described in Table 63 and Table 64 and also in the example settings below.
The FLL Lock signal is an input to the CODEC Interrupt function, with selectable enable and polarity
control. The associated interrupt bit (FLL_LCK) is latched once set and can be polled at any time or
used to trigger the CODEC IRQ output. The interrupt bit is reset by writing a logic ‘1’ to the FLL_LCK
register bit. See “CODEC Interrupt Event Output” for more details of the CODEC Interrupt event
handling.
The FLL Lock signal is asserted when FLL Lock has been reached. When configured to generate an
interrupt event, the default polarity (FLL_LCK_POL = 0) will cause an interrupt event when FLL Lock
has been reached.
If direct output of the FLL Lock status bit is required to the external pins of the WM8400, the following
register settings are required:
When GPIOn_SEL = 0100, the FLL Lock signal is output on the GPIOn pin. A logic 1 indicates that
FLL Lock has been reached. Note that the polarity is not programmable for GPIO output; the
GPIO_POL and FLL_LCK_POL fields affect the Interrupt behaviour only.
The register fields used to configure the FLL Lock GPIO function are described in Table 67.
REGISTER
ADDRESS
R18
R22 (16h)
R23 (17h)
•
•
•
•
•
•
•
•
ALRCGPIO1 = 1 (only required if using GPIO1)
MCLK_SRC = 0 (only required if using GPIO2)
AIF_SEL = 0 (only required if using GPIO3, GPIO4 or GPIO5)
ALRCGPIO6 = 0 (only required if using GPIO6)
AIF_TRIS = 0
GPIOn_SEL = 0100 for the selected FLL Lock status output pin
GPIOn_PU = 0 for the selected FLL Lock status output pin
GPIOn_PD = 0 for the selected FLL Lock status output pin
11
11
11
BIT
TEMPOK
(rr)
TEMPOK_IRQ_
ENA
TEMPOK_POL
LABEL
0b
0b
1b
DEFAULT
Temperature OK CODEC interrupt
0 = interrupt not set
1 = interrupt is set
This bit is latched once set. The
TEMPOK_POL bit determines the polarity of
the input event to set this bit. It is cleared
when a ‘1’ is written.
Temperature Sensor CODEC IRQ Enable
0 = disabled
1 = enabled
Temperature Sensor polarity
0 = Non-inverted
1 = Inverted
DESCRIPTION
PP, April 2009, Rev 3.0
WM8400
107