wm8400 Wolfson Microelectronics plc, wm8400 Datasheet - Page 37

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wm8400

Manufacturer Part Number
wm8400
Description
Wolfson Audioplustm Hi-fi Audio Codec And Power Management Unit For Mobile Multimedia
Manufacturer
Wolfson Microelectronics plc
Datasheet
w
Pre-Production
CODEC POWER ON RESET CIRCUIT
Figure 10 Typical CODEC Power up Sequence where AVDD is Powered before DCVDD
Figure 9 Internal Power on Reset Circuit Schematic
The WM8400 includes an internal CODEC Power-On-Reset Circuit, as shown in Figure 9, which is
used to reset the CODEC digital logic into a default state after power up. The CODEC POR circuit is
powered from AVDD and monitors DCVDD. It asserts PORB low if AVDD or DCVDD is below a
minimum threshold. In a typical application, DCVDD may be supplied from one of the integrated LDO
Regulators.
Figure 10 shows a typical power-up sequence where AVDD comes up first. When AVDD goes above
the minimum threshold, V
low and the chip is held in reset. In this condition, all writes to the control interface are ignored. After
AVDD has reached its full supply level, DCVDD rises to V
registers are in their default state and writes to the control interface may take place.
On power down, where AVDD falls first, PORB is asserted low whenever AVDD drops below the
minimum threshold V
pora_off
pora
.
, there is enough voltage for the circuit to guarantee PORB is asserted
pord_on
and PORB is released high and all
PP, April 2009, Rev 3.0
WM8400
37

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