wm8400 Wolfson Microelectronics plc, wm8400 Datasheet - Page 162

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wm8400

Manufacturer Part Number
wm8400
Description
Wolfson Audioplustm Hi-fi Audio Codec And Power Management Unit For Mobile Multimedia
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8400
w
R05 (05h)
Audio
Interface (1)
REGISTER
ADDRESS
10
9:8
7
6
5
4
3:2
1
0
15
14
13
12
11:9
8
7
6:5
BIT
ROP_ENA
(rw)
LOPGA_ENA
(rw)
ROPGA_ENA
(rw)
LOMIX_ENA
(rw)
ROMIX_ENA
(rw)
DACL_ENA
(rw)
DACR_ENA
(rw)
AIFADCL_SRC
AIFADCR_SRC
AIFADC_TDM
AIFADC_TDM_CHA
N
AIF_BCLK_INV
AIF_LRCLK_INV
AIF_WL
[1:0]
LABEL
0b
00b
0b
0b
0b
0b
00b
0b
0b
0b
1b
0b
0b
0b
0b
0b
10b
DEFAULT
ROP Line Out and ROPMIX Enable
0 = disabled
1 = enabled
Reserved - Do Not Change
LOPGA Left Volume Control Enable
0 = disabled
1 = enabled
ROPGA Right Volume Control Enable
0 = disabled
1 = enabled
LOMIX Left Output Mixer Enable
0 = disabled
1 = enabled
ROMIX Right Output Mixer Enable
0 = disabled
1 = enabled
Reserved - Do Not Change
Left DAC Enable
0 = disabled
1 = enabled
Right DAC Enable
0 = disabled
1 = enabled
Left Digital Audio channel source
0 = Left ADC data is output on left channel
1 = Right ADC data is output on left channel
Right Digital Audio channel source
0 = Left ADC data is output on right channel
1 = Right ADC data is output on right channel
ADC TDM Enable
0 = Normal ADCDAT operation
1 = TDM enabled on ADCDAT
ADCDAT TDM Channel Select
0 = ADCDAT outputs data on slot 0
1 = ADCDAT output data on slot 1
Reserved - Do Not Change
BCLK Invert
0 = BCLK not inverted
1 = BCLK inverted
Right, left and I
0 = normal LRCLK polarity
1 = invert LRCLK polarity
DSP Mode – mode A/B select
0 = MSB is available on 2nd BCLK rising edge after LRC rising
edge (mode A)
1 = MSB is available on 1st BCLK rising edge after LRC rising
edge (mode B)
Digital Audio Interface Word Length
00 = 16 bits
01 = 20 bits
10 = 24 bits
11 = 32 bits
Note - see “Companding” for the selection of 8-bit mode
2
S modes – LRCLK polarity
DESCRIPTION
PP, April 2009, Rev 3.0
Pre-Production
162

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