wm8400 Wolfson Microelectronics plc, wm8400 Datasheet - Page 124

• Manufacturer Part Number: wm8400
• Description: Wolfson Audioplustm Hi-fi Audio Codec And Power Management Unit For Mobile Multimedia
• Manufacturer: Wolfson Microelectronics plc

WM8400
w
AUDIO DATA FORMATS (TDM MODE)
TDM is supported in master and slave mode and is enabled by register bits AIF_ADC_TDM and
AIF_DAC_TDM. All audio interface data formats support time division multiplexing (TDM) for ADC
and DAC data.
Two time slots are available (Slot 0 and Slot 1), selected by register bits AIFADC_TDM_CHAN and
AIFDAC_TDM_CHAN which control time slots for the ADC data and the DAC data.
When TDM is enabled, the ADCDAT pin will be tri-stated immediately before and immediately after
data transmission, to allow another ADC device to drive this signal line for the remainder of the
sample period. Note that it is important that two ADC devices do not attempt to drive the data pin
simultaneously. A short circuit may occur if the transmission time of the two ADC devices overlap
with each other. See “Audio Interface Timing - TDM Mode” for details of the ADCDAT output relative
to BCLK signal. Note that it is possible to ensure a gap exists between transmissions by setting the
transmitted word length to a value higher than the actual length of the data. For example, if 32-bit
word length is selected where only 24-bit data is available, then the WM8400 interface will tri-state
after transmission of the 24-bit data, ensuring a gap after the WM8400’s TDM slot.
When TDM is enabled, BCLK frequency must be high enough to allow data from both time slots to
be transferred. The relative timing of Slot 0 and Slot 1 depends upon the selected data format as
shown in Figure 76 to Figure 80.
Figure 76 TDM in Right-Justified Mode
Figure 77 TDM in Left-Justified Mode
Figure 78 TDM in I
DACLRC/
ADCLRC
DACDAT/
ADCDAT
BCLK
2
S Mode
1 BCLK
SLOT 0
LEFT CHANNEL
SLOT 1
1/fs
1 BCLK
SLOT 0
RIGHT CHANNEL
SLOT 1
PP, April 2009, Rev 3.0
Pre-Production
124