bt8970 Mindspeed Technologies, bt8970 Datasheet - Page 41

• Manufacturer Part Number: bt8970
• Description: Single-chip Hdsl Transceiver
• Manufacturer: Mindspeed Technologies

Table 3-1. Register Table (3 of 5)
ADDR
(hex)
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
far_end_high_alarm_th_high
far_end_high_alarm_th_low
far_end_low_alarm_th_high
far_end_low_alarm_th_low
noise_histogram_th_high
noise_histogram_th_low
snr_alarm_th_high
ep_pause_th_high
snr_alarm_th_low
cursor_level_high
ep_pause_th_low
dagc_target_high
cursor_level_low
dagc_target_low
detector_modes
dc_offset_high
dc_offset_low
scr_sync_th
tx_calibrate
Register
tx_gain
Label
Write
Read
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
enable_peak_
detector
D[15]
D[15]
D[15]
D[15]
D[15]
D[15]
D[15]
D[15]
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
—
—
7
output_mux_
A.M.
control[1]
D[14]
D[14]
D[14]
D[14]
D[14]
D[14]
D[14]
D[14]
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
—
—
6
10:00
tx_calibrate[3]
output_mux_
tx_gain[3]
control[0]
D[13]
D[13]
D[13]
D[13]
D[13]
D[13]
D[13]
D[13]
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
5
scr_out_to_dfe
11/29/00
tx_calibrate[2]
tx_gain[2]
D[12]
D[12]
D[12]
D[12]
D[12]
D[12]
D[12]
D[12]
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
4
Bit Number
tx_calibrate[1]
tx_gain[1]
two_level
D[11]
D[11]
D[11]
D[11]
D[11]
D[11]
D[11]
D[11]
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
3
tx_calibrate[0]
tx_gain[0]
lfsr_lock
D[10]
D[10]
D[10]
D[10]
D[10]
D[10]
D[10]
D[10]
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
2
htur_lfsr
D[1]
D[9]
D[1]
D[9]
D[1]
D[9]
D[1]
D[1]
D[9]
D[1]
D[9]
D[1]
D[9]
D[1]
D[9]
D[1]
D[9]
—
—
1
descr_on
D[0]
D[8]
D[0]
D[8]
D[0]
D[8]
D[0]
D[0]
D[8]
D[0]
D[8]
D[0]
D[8]
D[0]
D[8]
D[0]
D[8]
—
—
0