zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 112
zl50405
Manufacturer Part Number
zl50405
Description
Managed5-port 10/100 M Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50405.pdf
(132 pages)
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12.3.10.13
CPU Address EBA
Accessed by CPU (R/W)
12.3.10.14
CPU Address EBB, EBC
Accessed by CPU (RO)
12.3.10.15
CPU Address EBD
Accessed by CPU (R/W)
12.3.10.16
CPU Address EC0
Accessed by CPU (R/W)
Bits [3:0]:
Bits [7:4]:
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bits [7:4]:
Bits [3:0]
Bit [4]
QCTRL
BMBISTR0, BMBISTR1
BMControl
BUFF_RST
Assign a value that the pool to be reset
0: port 0 pool
1: port 1 pool
2: port 2 pool
3: port 3 pool
7-4: rsvd
8: port MMAC pool
9: shared pool
10: class 1 pool
11: class 2 pool
12: class 3 pool
13: multicast pool
14: cpu pool
15: reserved
If this bit is 1, then all the pools are assigned
Stop QM FSM at idle
Stop MCQ FSM at idle
Stop new granule grant to any source
Stop release granule from any source
Reserved
Block Memory redundancy control
0: Use hardware detected value
All others: Overwrite the hardware detected memory swap map
Reserved
Zarlink Semiconductor Inc.
ZL50405
112
Data Sheet
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