zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 25

• Manufacturer Part Number: zl50405
• Description: Managed5-port 10/100 M Ethernet Switch
• Manufacturer: Zarlink Semiconductor

2.4
The main function of the frame engine is to forward a frame to its proper destination port or ports. When a frame
arrives, the frame engine parses the frame header (64 bytes) and formulates a switching request, sent to the
search engine, to resolve the destination port. The arriving frame is moved to the internal memory. After receiving a
switch response from the search engine, the frame engine performs transmission scheduling based on the frame’s
priority. The frame engine forwards the frame to the MAC module when the frame is ready to be sent.
2.5
The Search Engine resolves the frame’s destination port or ports according to the destination MAC address (L2) or
IP multicast address (IP multicast packet) by searching the database. It also performs MAC learning, priority
assignment, and trunking functions.
2.6
The ZL50405 provides the ability to monitor a link and detect a simple link failure. The Link Heart Beat (LHB) packet
generation module allows simultaneous tracking of all the RMAC ports.
Periodically, a LHB message will be sent for each link when inactivity is detected with in a programmable time
period, If a reply is not received in a specified amount of time, the failover detection module will identify a
point-to-point failure for that link. The failover detection module will then interrupt the CPU.
The LHB packet response module can also reply to LHB messages initiated by other ZL50405 devices in the
system, or by non-ZL50405 devices which use a conventional and recognizable LHB message format.
2.7
The ZL50405 supports a state machine monitoring block which can trigger a reset or interrupt if any state machine
is determined to be stuck in a non-idle state for more than 5 seconds. This feature is enabled via a bootstrap pin
(TSTOUT12). It also requires some register configuration via the CPU interface.
See Programming Timeout Reset application note, ZLAN-41, for more information.
2.8
An IEEE1149.1 compliant test interface is provided for boundary scan.
3.0
One extra port is dedicated to the CPU via the CPU interface module. Three modes this port can operate:
managed, lightly managed or unmanaged mode. The different between these modes is tx/rx Ethernet frame, tx/rx
control frame and receiving interrupt due to the lack of constant attention or processing power from the CPU.
The CPU interface utilizes a 8/16-bit bus in managed mode. It also supports a serial+MII, serial only, and an I
interface, which provides an easy and lower cost way to configure the system for reduced management.
Frame Engine
Search Engine
Heartbeat Packet Generation and Response
Timeout Reset Monitor
JTAG
Management and Configuration
Zarlink Semiconductor Inc.
ZL50405
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Data Sheet
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