zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 29

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zl50405

Manufacturer Part Number
zl50405
Description
Managed5-port 10/100 M Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
3.1
3.1.1
The ZL50405 has many programmable parameters, covering such functions as QoS weights, VLAN control, and
port mirroring setup. In managed mode, the CPU interface provides an easy way of configuring these parameters.
The parameters are contained in 8-bit configuration registers. The device allows indirect access to these registers,
as follows:
If operating in 8-bit interface mode, two “index” registers (addresses 000b and 001b) need to be written, to
indicate the desired 16-bit register address. In 16-bit mode, only one register (address 000b) needs to be
written for the desired 16-bit register address.
In serial mode, the address, command and data are shifted in serially. To access the configuration registers,
only one “index” register (addresses 000b) needs to be written with the configuration register address. The
desired data can be written into or read from the “data” register (address 010b).
To indirectly configure the register addressed by the index register(s), a “data” register (address 010b) must
be written with the desired 8-bit data.
Register Configuration, Frame Transmission, and Frame Reception
For example, if “XX” is required to be written to register “YY”, a write of “YY” is required to write to
address “000b” (Index register). Then, a write of “XX” is required to write to address “010b” (Data
Register). This completes the register write and register “YY” will contain the value of “XX”.
Register Configuration
C PU f ram e
R ec eiv e
Tc lk
FIFO
MII Interf ac e
Tx d Tx en
C PU f ram e
Trans m it
FIFO
R x d R x dv
Figure 5 - Overview of the SSI+MII Interface
16-bit A ddres s
Index R eg 0
(Addr = 0)
Rclk
Processor
8-bit Data Bus
Zarlink Semiconductor Inc.
3-bit Addres s Bus
Addres s
C onf ig D ata
(Addr = 2)
R egis ters
Inderec t
Ac c es s
ZL50405
Internal
Serial Out
R eg
Sync hronous Serial Interf ac e
29
Serial In
16-bit D ata Bus
Status R eg
C om m and/
(Addr = 4)
Strobe
I/O D ata MU X
Interrupt
Interrupt R eg
IN T C S W R
(Addr = 5)
Interrupt
8/16-bit Data Bus
C om m and 1
R ec eiv e
C ontrol
FIFO
C ontrol C om m and
(Addr = 6)
C om m and 1
1 R eg
Trans m it
C ontrol
FIFO
C om m and 2
C om m and 2
(Addr = 7)
Data Sheet
Trans m it
C ontrol
C ontrol
FIFO
R eg

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