zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 26

• Manufacturer Part Number: zl50405
• Description: Managed5-port 10/100 M Ethernet Switch
• Manufacturer: Zarlink Semiconductor

Supported CPU interface modes are
1. 16-bit CPU interface similar to the Industry Standard Architecture (ISA) specification.
2. 8-bit CPU interface similar to ISA.
3. Serial with MII. A synchronous serial interface (SSI) bus is used for accessing the configuration register and
4. Lightly Managed Serial. Configuration registers access, Control frame and CPU transmit/receive packets are
5. Unmanaged Serial. The device can be configured by EEPROM using an I²C interface at bootup, or via a syn-
The CPU interface provides for easy and effective management of the switching system.
Figure 3 on page 27 provides an overview of the 8/16-bit interface. Figure 4 on page 28 provides an overview of the
SSI interface. Figure 5 on page 29 provides an overview of the SSI+MII interface.
16-bit CPU
8-bit CPU
Serial with MII interface
Lightly Managed Serial
Unmanaged Serial
control frame. MII is used for sending and receiving CPU packets.
sent through a synchronous serial interface (SSI) bus.
chronous serial interface (SSI) otherwise. All configuration registers and internal control blocks are accessible
by the interface. However, the CPU cannot receive or transmit frames nor will it receive any interrupt informa-
tion.
Operation Mode
Table 6 - Supported CPU interface modes
16-bit
8-bit
NA
NA
NA
ISA Interface
Zarlink Semiconductor Inc.
ZL50405
26
NA
NA
Yes
Yes
Yes
Serial
NA
NA
Yes
No
No
MII
NA
NA
No
No
Yes
Data Sheet
I²C