zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 113

• Manufacturer Part Number: zl50405
• Description: Managed5-port 10/100 M Ethernet Switch
• Manufacturer: Zarlink Semiconductor

If CPU wants to reset pools again, CPU has to clear bit 5 and then set bit 5.
Note : Before CPU doing so, CPU should set QCTRL (CPU Address EBA) bit 2 and bit 3 to one. After reset the
pools, CPU shall reprogram free granule link list (CPU address EC1, EC2, EC3, EC4, EC5, EC6). Then clear
QCTRL (EBA).
12.3.10.17
CPU address EC1
Accessed by CPU (R/W)
CPU address EC2
Accessed by CPU (R/W)
If CPU wants to write again, CPU has to clear bit 15 and then set bit 15.
12.3.10.18
CPU address EC3
Accessed by CPU (R/W)
CPU address EC4
Accessed by CPU (R/W)
If CPU wants to write again, CPU has to clear bit 15 and then set bit 15.
12.3.10.19
CPU address EC5
Accessed by CPU (R/W)
Bit [5]
Bits [7:6]
Bits [7:0]
Bits [7:0]
Bits [6:0]
Bit [7]
Bits [7:0]
Bits [6:0]
Bit [7]
FCB_HEAD_PTR0, FCB_HEAD_PTR1
FCB_TAIL_PTR0, FCB_TAIL_PTR1
FCB_NUM0, FCB_NUM1
Fcb_head_ptr[14:8]. The head pointer of free granule link that CPU assigns.
Set 1 to write
Set 1 to reset the pools that are assigned
Reserved
Fcb_head_ptr[7:0]. The head pointer of free granule link that CPU assigns.
Fcb_number[7:0]. The total number of granules that CPU assigns.
Fcb_tail_ptr[7:0]. The tail pointer of free granule link that CPU assigns.
Fcb_tail_ptr[14:8]. The tail pointer of free granule link that CPU assigns.
Set 1 to write
Zarlink Semiconductor Inc.
ZL50405
113
Data Sheet