hi-3282 Holt Integrated Circuits, Inc., hi-3282 Datasheet

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hi-3282

Manufacturer Part Number
hi-3282
Description
Serial Transmitter And Dual Receiver
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet

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APPLICATIONS
GENERAL DESCRIPTION
The HI-3282 is a silicon gate CMOS device for interfacing
the ARINC 429 serial data bus to a 16-bit parallel data bus.
Two receivers and an independent transmitter are
provided. The receiver input circuitry and logic are
designed to meet the ARINC 429 specifications for loading,
level detection, timing, and protocol. The ARINC inputs of
the HI-3282-10 configurations also have internal lightning
protection to DO-160D, Level 3. The transmitter section
provides the ARINC 429 communication protocol.
external ARINC 429 Line Driver such as the Holt HI-3182 or
HI-8585 is required to translate the 5 volt logic outputs to
ARINC 429 drive levels.
The 16-bit parallel data bus exchanges the 32-bit ARINC
data word in two steps when either loading the transmitter
or interrogating the receivers. The data bus interfaces with
CMOS and TTL.
Timing of all the circuitry begins with the master clock input,
CLK. For ARINC 429 applications, the master clock
frequency is 1 MHz.
Each independent receiver monitors the data stream with a
sampling rate 10 times the data rate. The sampling rate is
software selectable at either 1MHz or 125KHz. The results
of a parity check are available as the 32nd ARINC bit.
The transmitter has a First In, First Out (FIFO) memory to
store 8 ARINC words for transmission. The data rate of the
transmitter is software selectable by dividing the master
clock, CLK, by either 10 or 80. The master clock is used to
set the timing of the ARINC transmission within the required
resolution.
(DS3282 Rev. K)
(
January 2008
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Avionics data communication
Serial to parallel conversion
Parallel to serial conversion
HOLT INTEGRATED CIRCUITS
www.holtic.com
An
Serial Transmitter and Dual Receiver
FEATURES
PIN CONFIGURATION
BD12 - 10
BD15 - 7
BD14 - 8
BD13 - 9
BD11 - 11
D/R1
D/R2
EN1
EN2
SEL - 4
N/C - 1
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(See page 10 for additional pin configurations)
ARINC specification 429 compatible
Automatic transmitter data timing
Compatible with Industry-standard alternate
Small footprint 44-pin PQFP package option
16-Bit parallel data bus
Direct receiver interface to ARINC bus
Internal Lightning Protection of ARINC inputs
Timing control 10 times the data rate
Selectable data clocks
Self test mode
Parity functions
Low power, single 5 volt supply
Industrial & full military temperature ranges
parts
per DO-160D, Level 3 in -10 configurations
- 2
- 3
- 5
- 6
44-Pin Plastic Quad Flat Pack (PQFP)
HI-3282PQT-10
HI-3282PQI-10
HI-3282PQT
HI-3282PQI
&
HI-3282
ARINC 429
(Top View)
33 - N/C
32 - N/C
31 -
30 - ENTX
29 -
28 -429DO
27 - TX/R
26 -
25 -
24 - BD00
23 - BD01
CWSTR
429DO
PL2
PL1
01/08
X

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hi-3282 Summary of contents

Page 1

... January 2008 GENERAL DESCRIPTION The HI-3282 is a silicon gate CMOS device for interfacing the ARINC 429 serial data bus to a 16-bit parallel data bus. Two receivers and an independent transmitter are provided. The receiver input circuitry and logic are designed to meet the ARINC 429 specifications for loading, level detection, timing, and protocol ...

Page 2

... INPUT CLK INPUT TX CLK OUTPUT MR INPUT DBCEN INPUT HI-3282 DESCRIPTION +5V ±5% ARINC receiver 1 positive input ARINC receiver 1 negative input ARINC receiver 2 positive input ARINC receiver 2 negative input Receiver 1 data ready flag Receiver 2 data ready flag Receiver data byte selection (0 = BYTE BYTE 2) ...

Page 3

... FUNCTIONAL DESCRIPTION CONTROL WORD REGISTER The HI-3282 contains 11 data flip flops whose D inputs are con- nected to the data bus and clocks connected to flip flop provides options to the user as follows: DATA BUS FUNCTION CONTROL PIN BD04 PAREN Enables parity bit insertion into ...

Page 4

... Kohm resistors, they are just below the standard 6.5 V minimum ARINC data threshold and just above the 2.5 V maximum ARINC null threshold. The receivers of the HI-3282-10 when used with external 10 Kohm resistors will withstand DO-160D, Level 3, waveforms 3, 4 and 5A. No additional lightning protection circuit is necessary. ...

Page 5

... X 31 FIFO DATA BUS FIGURE 3. TRANSMITTER BLOCK DIAGRAM HI-3282 The parity generator counts the ONES in the 31-bit word. If the BD12 control word bit is set low, the 32nd bit transmitted will make parity odd. If the control bit is high, the parity is even. SELF TEST ...

Page 6

... FUNCTIONAL DESCRIPTION (cont.) REPEATER OPERATION The repeater mode of operation allows a data word that has been received by the HI-3282 to be placed directly into its FIFO for transmission. After a 32-bit word has been shifted into the receiver shift register, the D/R flag will go low. A logic "0" is placed on the SEL ...

Page 7

... ENDAT 429DO or 429DO 429DI BIT 32 D D/R D/REN EN t SELEN SEL DON'T CARE t ENPL PL1 PL2 TX/R ENTX 429DO HI-3282 TRANSMITTER OPERATION BYTE 1 VALID t DWSET t DWHLD PL12 TRANSMITTING DATA ARINC BIT DATA DATA BIT 1 BIT 2 REPEATER OPERATION TIMING t END ENEN ...

Page 8

... Logic "0" Output Voltage Output Current: (Bi-directional Pins) Output Current: (All Other Outputs) Output Capacitance: SUPPLY INPUT Standby Supply Current: Operating Supply Current: HI-3282 -0.3V to +7V Power Dissipation -29V to +29V Operating Temperature Range: (Industrial) -0.3V to Vcc +0.3V Storage Temperature Range: 10mA SYMBOL CONDITIONS ...

Page 9

... Delay - ENTX HIGH to 429DO or Delay - ENTX HIGH to 429DO or Delay - 32nd ARINC Bit to TX/R HIGH Spacing - TX/R HIGH to ENTX L0W REPEATER OPERATION TIMING Delay - TX/R LOW to ENTX HIGH Master Reset Pulse Width ARINC Data Rate and Bit Timing HI-3282 + SYMBOL Pulse Width - CWSTR t CWSTR CWSTR ...

Page 10

... BD06 HI-3282CDI / HI-3282CDT / HI-3282CDM 40-PIN CERAMIC SIDE-BRAZED DIP 39 N/C 38 N/C 37 CWSTR 36 ENTX 35 429DO 34 429DO 33 TX/R 32 PL2 31 PL1 30 BD00 29 BD01 HI-3282CLI / HI-3282CT / HI-3282CLM HI-3282CLI-10 / HI-3282CT-10 / HI-3282CLM-10 44-Pin Leadless Chip Carrier (LCC) HOLT INTEGRATED CIRCUITS 10 (See page 1 for the 44-pin Plastic QFP ...

Page 11

... Internal lightning protection to DO-160D, Level 3 (-10 configurations only). Requires a 10K Ohm resistor in series with each ARINC input to guarantee specified voltage thresholds. (2) The 44-pin J-Lead PLCC package is rated as Moisture Sensitivity Level (MSL) 1 and does not require special moisture handling precautions. HI-3282 INPUT SERIES RESISTANCE BUILT-IN REQUIRED EXTERNALLY 35K Ohm ...

Page 12

... SQ. .173 ±.008 (4.394 ±.203) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-3282 PACKAGE DIMENSIONS 2.020 MAX (51.308 MAX) .050 TYP (1.270 TYP) .085 ±.009 (2.159 ±.229) ...

Page 13

... INDEX (.508) PIN 1 .651 ±.011 (16.535 ±.279) SQ. BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-3282 PACKAGE DIMENSIONS .394 BSC SQ. (10.0) .079 +.004 / -.002 (2.00 +.10 / -.05) .040 x 45° 3 PLCS (1.016 x 45°) .075 ±.004 (1.905 ± ...

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