hi-3282 Holt Integrated Circuits, Inc., hi-3282 Datasheet - Page 2

• Manufacturer Part Number: hi-3282
• Description: Serial Transmitter And Dual Receiver
• Manufacturer: Holt Integrated Circuits, Inc.

PIN DESCRIPTION
429DI1 (A)
429DI1 (B)
429DI2 (A)
429DI2 (B)
SYMBOL
CWSTR
TX CLK
DBCEN
429DO
429DO
ENTX
BD15
BD14
BD13
BD12
BD10
BD09
BD08
BD07
BD06
BD05
BD04
BD03
BD02
BD01
BD00
BD11
D/R1
D/R2
GND
TX/R
VCC
EN1
EN2
CLK
SEL
PL1
PL2
MR
FUNCTION
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
POWER
POWER
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
+5V ±5%
ARINC receiver 1 positive input
ARINC receiver 1 negative input
ARINC receiver 2 positive input
ARINC receiver 2 negative input
Receiver 1 data ready flag
Receiver 2 data ready flag
Receiver data byte selection (0 = BYTE 1) (1 = BYTE 2)
Data Bus control, enables receiver 1 data to outputs
Data Bus control, enables receiver 2 data to outputs if
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
0 V
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Latch enable for byte 1 entered from data bus to transmitter FIFO.
Latch enable for byte 2 entered from data bus to transmitter FIFO. Must follow
Transmitter ready flag. Goes low when ARINC word loaded into FIFO. Goes high
after transmission and FIFO empty.
"ONES" data output from transmitter.
"ZEROES" data output from transmitter.
Enable Transmission
Clock for control word register
Master Clock input
Transmitter Clock equal to Master Clock (CLK), divided by either 10 or 80.
Master Reset, active low
Data bit control Enable. (Active low, with internal pull up to VDD).
HOLT INTEGRATED CIRCUITS
HI-3282
DESCRIPTION
2
EN1
is high
PL1.