gs8662d08bgd-400i GSI Technology, gs8662d08bgd-400i Datasheet - Page 12

• Manufacturer Part Number: gs8662d08bgd-400i
• Description: 72mb Sigmaquad-ii Tm Burst Of 4 Sram
• Manufacturer: GSI Technology

FLXDrive-II Output Driver Impedance Control
HSTL I/O SigmaQuad-II SRAMs are supplied with programmable impedance output drivers. The ZQ pin must be connected to
V
5X the value of the desired RAM output impedance. The allowable range of RQ to guarantee impedance matching continuously is
between 175 and 350. Periodic readjustment of the output driver impedance is necessary as the impedance is affected by drifts
in supply voltage and temperature. The SRAM’s output impedance circuitry compensates for drifts in supply voltage and
temperature. A clock cycle counter periodically triggers an impedance evaluation, resets and counts again. Each impedance
evaluation may move the output driver impedance level one step at a time towards the optimum level. The output driver is
implemented with discrete binary weighted impedance steps.
x36 Byte Write Enable (BWn) Truth Table
x18 Byte Write Enable (BWn) Truth Table
Rev: 1.02a 5/2011
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
SS
BW0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
via an external resistor, RQ, to allow the SRAM to monitor and adjust its output driver impedance. The value of RQ must be
BW0
1
0
1
0
BW1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
BW2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
BW1
1
1
0
0
BW3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
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D0–D8
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D9–D17
GS8662D08/09/18/36BD-400/350/333/300/250
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D18–D26
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D9–D17
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© 2011, GSI Technology
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D27–D35
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