k9f5608u0b-yib0 Samsung Semiconductor, Inc., k9f5608u0b-yib0 Datasheet - Page 12

• Manufacturer Part Number: k9f5608u0b-yib0
• Description: 32m X 8 Bit , 16m X 16 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

K9F5608U0B-VCB0,VIB0,FCB0,FIB0
K9F5608Q0B-DCB0,DIB0,HCB0,HIB0
K9F5608U0B-YCB0,YIB0,PCB0,PIB0
K9F5608U0B-DCB0,DIB0,HCB0,HIB0
VALID BLOCK
NOTE :
1. The
2. The 1st block, which is placed on 00h block address, is fully guaranteed to be a valid block, does not require Error Correction.
3.
4.
AC TEST CONDITION
(K9F56XXX0B-XCB0 :TA=0 to 70 C, K9F56XXX0B-XIB0 :TA=-40 to 85 C
CAPACITANCE
NOTE : Capacitance is periodically sampled and not 100% tested.
MODE SELECTION
NOTE : 1. X can be V
Program/Erase Characteristics
K9F56XXQ0B : Vcc=1.70V~1.95V , K9F56XXU0B : Vcc=2.7V~3.6V unless otherwise noted)
Valid Block Number
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
K9F56XXQ0B:Output Load (VccQ:1.8V +/-10%)
K9F56XXU0B:Output Load (VccQ:3.0V +/-10%)
K9F56XXU0B:Output Load (VccQ:3.3V +/-10%)
Input/Output Capacitance
Input Capacitance
Program Time
Number of Partial Program Cycles
in the Same Page
Block Erase Time
is presented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits
program factory-marked bad blocks. Refer to the attached technical notes for a appropriate management of invalid blocks.
The number of initial bad blocks upon shipping does not exceed 20.
Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb memory space.
CLE
H
H
X
X
X
X
X
L
L
L
L
L
K9F56XXX0B
2. WP should be biased to CMOS high or CMOS low for standby.
ALE
Parameter
X
H
H
L
L
L
L
L
X
X
X
X
(1)
Item
IL
Parameter
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid blocks
or V
CE
X
X
X
X
H
L
L
L
L
L
L
L
(
T
Parameter
IH.
A
=25 C, V
WE
H
H
X
X
X
X
X
CC
=1.8V/3.3V, f=1.0MHz)
Symbol
Symbol
RE
H
H
H
H
H
H
H
X
X
X
X
C
N
C
VB
I/O
IN
Spare Array
Main Array
GND
K9F5616Q0B-DCB0,DIB0,HCB0,HIB0
K9F5616U0B-YCB0,YIB0,PCB0,PIB0
K9F5616U0B-DCB0,DIB0,HCB0,HIB0
0V
X
X
X
X
L
L
L
L
L
X
X
Test Condition
0V/V
1 TTL GATE and CL=30pF
WP
V
V
H
H
H
H
H
X
X
X
X
X
L
2013
IN
Min
IL
CC
Symbol
=0V
=0V
t
t
(2)
PROG
K9F56XXQ0B
Nop
BERS
12
0V to VccQ
Data Input
Data Output
During Read(Busy) on K9F5608U0B_Y,P or K9F5608U0B_V,F
During Read(Busy) on the devices except K9F5608U0B_Y,P and
K9F5608U0B_V,F
During Program(Busy)
During Erase(Busy)
Write Protect
Stand-by
VccQ/2
5ns
Read Mode
Write Mode
-
Min
-
-
-
-
Typ.
Min
-
-
-
Command Input
Address Input(3clock)
Command Input
Address Input(3clock)
Typ
200
2
-
-
Mode
1 TTL GATE and CL=100pF
1 TTL GATE and CL=50pF
FLASH MEMORY
2048
Max
Max
10
10
K9F56XXU0B
0.4V to 2.4V
Max
500
1.5V
2
3
3
5ns
.
Do not erase or
Blocks
Unit
Unit
pF
pF
cycles
cycles
Unit
ms
s