k9f5608u0b-yib0 Samsung Semiconductor, Inc., k9f5608u0b-yib0 Datasheet - Page 32

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k9f5608u0b-yib0

Manufacturer Part Number
k9f5608u0b-yib0
Description
32m X 8 Bit , 16m X 16 Bit Nand Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
K9F5608U0B-VCB0,VIB0,FCB0,FIB0
K9F5608Q0B-DCB0,DIB0,HCB0,HIB0
K9F5608U0B-YCB0,YIB0,PCB0,PIB0
K9F5608U0B-DCB0,DIB0,HCB0,HIB0
READ ID
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of
00h. Two read cycles sequentially output the manufacture code(ECh), and the device code respectively. The command register
remains in Read ID mode until further commands are issued to it. Figure 13 shows the operation sequence.
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. Refer to table 5 for device status after reset operation. If the device is
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for tRST
after the Reset command is written. Refer to Figure 14 below.
CLE
CE
WE
ALE
RE
Figure 14. RESET Operation
R/B
Table5. Device Status
I/Ox
Figure 13. Read ID Operation
I/Ox
Operation Mode
FFh
90h
Address. 1cycle
00h
K9F5616Q0B-DCB0,DIB0,HCB0,HIB0
K9F5616U0B-YCB0,YIB0,PCB0,PIB0
K9F5616U0B-DCB0,DIB0,HCB0,HIB0
After Power-up
Read 1
t
WHR
t
AR
t
RST
t
CEA
32
t
REA
K9F5608Q0B
K9F5616Q0B
K9F5608U0B
K9F5616U0B
Maker code
Device
ECh
Waiting for next command
After Reset
FLASH MEMORY
Device code
Device
Code*
Device Code*
35h
75h
45h
55h

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