k9f5608u0b-yib0 Samsung Semiconductor, Inc., k9f5608u0b-yib0 Datasheet - Page 31

• Manufacturer Part Number: k9f5608u0b-yib0
• Description: 32m X 8 Bit , 16m X 16 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

K9F5608U0B-VCB0,VIB0,FCB0,FIB0
K9F5608Q0B-DCB0,DIB0,HCB0,HIB0
K9F5608U0B-YCB0,YIB0,PCB0,PIB0
K9F5608U0B-DCB0,DIB0,HCB0,HIB0
Table4. Read Status Register Definition
BLOCK ERASE
The Erase operation is done on a block basis. Block address loading is accomplished in two cycles initiated by an Erase Setup com-
mand(60h). Only address A
address loading initiates the internal erasing process. This two-step sequence of setup followed by execution command ensures that
memory contents are not accidentally erased due to external noise conditions.
At the rising edge of WE after the erase confirm command input, the internal write controller handles erase and erase-verify. When
the erase operation is completed, the Write Status Bit(I/O 0) may be checked. Figure 12 details the sequence.
Figure 12. Block Erase Operation
READ STATUS
The device contains a Status Register which may be read to find out whether program or erase operation is completed, and whether
the program or erase operation is completed successfully. After writing 70h command to the command register, a read cycle outputs
the content of the Status Register to the I/O pins on the falling edge of CE or RE, whichever occurs last. This two line control allows
the system to poll the progress of each device in multiple memory connections even when R/B pins are common-wired. RE or CE
does not need to be toggled for updated status. Refer to table 4 for specific Status Register definitions. The command register
remains in Status Read mode until further commands are issued to it. Therefore, if the status register is read during a random read
cycle, a read command(00h or 50h) should be given before sequential page read cycle.
R/B
I/Ox
I/O 8~15
I/O #
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
60h
14
Block Add. : A
Address Input(2Cycle)
to A
24
is valid while A
9
~ A
Reserved for Future
Device Operation
Program / Erase
24
Write Protect
K9F5616Q0B-DCB0,DIB0,HCB0,HIB0
K9F5616U0B-YCB0,YIB0,PCB0,PIB0
K9F5616U0B-DCB0,DIB0,HCB0,HIB0
Not use
Status
Use
9
D0h
to A
13
is ignored. The Erase Confirm command(D0h) following the block
31
t
BERS
"0" : Successful Program / Erase
"1" : Error in Program / Erase
"0"
"0"
"0"
"0"
"0"
"0" : Busy
"0" : Protected
Don’t care
70h
Definition
FLASH MEMORY
"1" : Not Protected
"1" : Ready
I/O
Fail
0
Pass