k9f5608u0c Samsung Semiconductor, Inc., k9f5608u0c Datasheet - Page 13

• Manufacturer Part Number: k9f5608u0c
• Description: 32m X 8 Bit 16m X 16 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

VALID BLOCK
NOTE :
1. The
2. The 1st block, which is placed on 00h block address, is fully guaranteed to be a valid block, does not require Error Correction.
3.
AC TEST CONDITION
(K9F56XXX0C-XCB0 :TA=0 to 70 C, K9F56XXX0C-XIB0:TA=-40 to 85 C
CAPACITANCE
NOTE : Capacitance is periodically sampled and not 100% tested.
MODE SELECTION
NOTE : 1. X can be V
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
K9F56XXQ0C:Output Load (Vcc
K9F56XXD0C:Output Load (Vcc
K9F56XXU0C:Output Load (Vcc
K9F56XXU0C:Output Load (Vcc
K9F5608Q0C
K9F5608D0C
K9F5608U0C
K9F56XXQ0C : Vcc=1.70V~1.95V , K9F56XXD0C : Vcc=2.4V~2.9V , K9F56XXU0C : Vcc=2.7V~3.6V unless otherwise noted)
Valid Block Number
Input/Output Capacitance
Input Capacitance
sented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits
factory-marked bad blocks. Refer to the attached technical notes for a appropriate management of invalid blocks.
Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb memory space.
CLE
H
H
L
L
L
L
X
L
X
X
X
X
device
2. WP should be biased to CMOS high or CMOS low for standby.
ALE
X
Parameter
H
H
X
X
X
X
L
L
L
L
L
(1)
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid blocks is pre-
Item
IL
Parameter
CE
X
X
X
X
H
L
L
L
L
L
L
L
or V
(
T
IH.
A
K9F5616Q0C
K9F5616U0C
=25 C, V
K9F5616D0C
WE
H
H
X
X
X
X
X
Q
Q
Q
Q
:1.8V +/-10%)
:2.65V +/-10%)
:3.0V +/-10%)
:3.3V +/-10%)
CC
RE
=1.8V/2.65V/3.3V, f=1.0MHz)
H
H
H
H
H
H
H
X
X
X
X
Symbol
Symbol
C
N
C
VB
I/O
IN
0V/V
PRE
1 TTL GATE and CL=30pF 1 TTL GATE and CL=30pF 1 TTL GATE and CL=50pF
X
X
X
X
X
X
X
X
X
X
X
CC
(2)
K9F56XXQ0C
Test Condition
0V/V
0V to Vcc
WP
Vcc
X
X
H
H
H
X
X
X
H
H
V
L
V
CC
2013
5ns
IN
Min
IL
-
=0V
Q
=0V
(2)
/2
13
Data Input
Data Output
During Read(Busy) on K9F5608U0C_Y,P or K9F5608U0C_V,F
During Read(Busy) on the devices except K9F5608U0C_Y,P and
K9F5608U0C_V,F
During Program(Busy)
During Erase(Busy)
Write Protect
Stand-by
Q
Read Mode
Write Mode
Typ.
Min
-
-
-
K9F56XXD0C
0V to Vcc
Command Input
Address Input(3clock)
Command Input
Address Input(3clock)
Vcc
5ns
-
Q
/2
Q
Mode
FLASH MEMORY
2048
Max
Max
10
10
1 TTL GATE and CL=100pF
.
Do not erase or program
K9F56XXU0C
0.4V to 2.4V
1.5V
5ns
Blocks
Unit
Unit
pF
pF