h55s1g62mfp-60 Hynix Semiconductor, h55s1g62mfp-60 Datasheet - Page 28

• Manufacturer Part Number: h55s1g62mfp-60
• Description: 64mx16bit Mobile Sdram
• Manufacturer: Hynix Semiconductor

DQ
CLK
Command
Command
DQ
READ
A read operation starts when a read command is input. Output buffer becomes Low-Z in the (/CAS Latency - 1)
cycle after read command set. The SDRAM can perform a burst read operation.
The burst length can be set to 1, 2, 4 and 8. The start address for a burst read is specified by the column address and
the bank select address at the read command set cycle. In a read operation, data output starts after the number of
clocks specified by the /CAS Latency. The /CAS Latency can be set to 2 or 3.
When the burst length is 1, 2, 4 and 8 the DOUT buffer automatically becomes High-Z at the next clock after the suc-
cessive burst-length data has been output.
The /CAS latency and burst length must be specified at the mode register.
Rev 1.2 / Jul. 2008
REA
REA
D
D
tCK
NOP
NOP
CL = 2
tLZ
CL = 3
tAC
NOP
NOP
Do0
Read Burst Showing CAS Latency
tOH
tLZ
tAC
NOP
Do0
Do1
tOH
1Gbit (64Mx16bit) Mobile SDR Memory
Do1
Do2
Undefined
H55S1G62MFP Series
Do3
Do2
Do3
Don't Care
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