lc89058w Sanyo Semiconductor Corporation, lc89058w Datasheet - Page 54
lc89058w
Manufacturer Part Number
lc89058w
Description
Cmos Digital Audio Interface Receiver
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
1.LC89058W.pdf
(64 pages)
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PTOXW[1:0]
FSSEL[1:0]
FSSEL1
DI15
DI7
1
FSSEL0
DI14
DI6
1
Setting of clock switch wait time
MOUT output contents setting (output “L” when PLL unlock status or when a value other than
those listed below is calculated)
00: Clock switching after 2.67ms from when the PLL lock status is identified (initial value)
01: Clock switching after 1.33ms from when the PLL lock status is identified
10: Clock switching after 0.67ms from when the PLL lock status is identified
11: Clock switching after when the PLL lock status is identified
00: Output “H” when 32kHz/44.1kHz/48kHz is calculated (Initial value)
01: Output “H” when 64kHz/88.2kHz/96kHz is calculated
10: Output “H” when 128kHz/176.4kHz/192kHz is calculated
11: Output “H”when 64kHz/88.2kHz/96kHz or higher is calculated
CCB address: 0xE8; Command address: 13; PLL clock
DI13
DI5
1
0
LC89058W-E
DI12
DI4
0
0
PTOXW1
DI11
DI3
0
PTOXW0
DI10
DI2
0
CAU
DI1
DI9
0
No.A1056-54/64
CAL
DI0
DI8
0
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